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<janrinze>
anyone here who has been working with the upduino v2?
<janrinze>
reading and writing flash seems to be unreliable. I wonder if it is related to the pcb.
<tnt>
janrinze: wouldn't be surprising
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<ZipCPU>
janrinze: Which flash chip? And what SCK speed?
<janrinze>
ZipCPU: the flash chip of the upduino v2 (config for up5k)
<janrinze>
ZipCPU: uploading with iceprog is not quite stable (3MHz according to the doc of iceprog)
<janrinze>
ZipCPU: also my bootloader tries to load at 12Mhz from the same flash
<janrinze>
ZipCPU: same design runs flawless on Lattice up5k evaluation board
<janrinze>
ZipCPU: there is a different FTDI chip used on the upduino v2 which might be holding the pins busy
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<ZipCPU>
janrinze: The flash connected to the FTDI, or to the FPGA?
<ZipCPU>
If the FPGA, it looks like the 25Q32 flash from Winbond
<daveshah>
I heard that the Upduinos were using recycled flash - someone found one with Cisco strings programmed into it
<ZipCPU>
Ouch!
<ZipCPU>
janrinze: Are you able to configure the FPGA with no problems, and only struggling to configure the flash?
<ZipCPU>
Did you notice the required change to the circuit board, as noted on the schematic, necessary to program the flash?
<janrinze>
ZipCPU: not aware of any required changes
<ZipCPU>
Check the notes on the schematic then
<janrinze>
ZipCPU: do you mean the shunts for flash vs ice ?
<ZipCPU>
Yes.
<janrinze>
those are the default for programming flash, right?
<ZipCPU>
I'm not sure. I don't understand what they are there for.
<janrinze>
There is an option to program the up5k internal flash
<janrinze>
isn't that OTP?
<ZipCPU>
Not sure. I didn't realize that the iCE40 had an internal flash.
<ZipCPU>
daveshah: Would you know anything about that?
<janrinze>
configuring the FPGA sometimes fails using iceprog.
<janrinze>
Often iceprog hangs after erasing
<ZipCPU>
Hmm ... let me check the source of iceprog
<tnt>
The fpga has an internal flash (OTP), iceprog can't program that. But iceprog can do direct sram loading of the fpga.
<ZipCPU>
janrinze: I'm not seeing anything stand out, but I know that following an erase the protocol says you are to wait until the erase is complete before continuing
<ZipCPU>
The erase is accomplished within a "flash_wait()" call inside icoprog.cc. Perhaps some careful printf's placed in there will help you track down what's going on?
<janrinze>
I wonder if the ftdi chip is the cause here.
<tnt>
janrinze: you said "unreliable" ... that kind of implied it works sometimes ?
<janrinze>
tnt: yes it works about 50% of the time
<janrinze>
tnt: on the lattice up5k evaluation board thee are no issues with iceprog
<tnt>
yeah I don't have any issues iwht iceprog on the icebreaker either.
<emeb>
I use iceprog with a lattice ultra eval board and dupont wires flying over to my own hardware for programming flash. It works fine even with horrible wiring.
<emeb>
I have had issues with FTDI parts doing weird stuff though. I bought one of those FTDI mini breakouts and for some reason it's gone bad - worked OK for a couple years then a few weeks back started failing. Enumerates with the wrong chip number, won't actually do I/O, etc.
<janrinze>
will attach a separate flash chip and see if i can read that from some other pins.
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<janrinze>
oh.. what to use to program the external flash?
<janrinze>
usbasp has miso/mosi so should be able to do this, right?
<emeb>
It might be physically capable of doing it, but the question is if there is software support.
<emeb>
usbasp seems targeted at programming AVR processors
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<janrinze>
emeb: true that.. i havea tl866 here too so going to try that one now