clifford changed the topic of #yosys to: Yosys Open SYnthesis Suite: http://www.clifford.at/yosys/ -- Channel Logs: https://irclog.whitequark.org/yosys
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<janrinze> daveshah: the script from dave gets me an error. it fails to read the flash ID.
<janrinze> daveshah: that would be the script from greg of course. (oops)
<janrinze> changed the ID check from A8 to 18. it runs now but very slow. No idea if it works or if it is busy killing the board slowly :D
<janrinze> after power cycle the lattice demo is gone. but also no sign of the uploaded design. hmm..
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<janrinze> daveshah: thanks for helping out with the script!
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<ZirconiumX> daveshah: So, pepijndevos has a script to turn JSON netlists into KiCad netlists
<ZirconiumX> But it's struggling with mapping an aliased netlist to the (expected) name
<ZirconiumX> For example in my Boneless JSON, (top-level) o_mem_data, alsru.o_mem_data and alsru.o_o all alias bit 19
<ZirconiumX> This means that whichever comes first in the JSON is the net name, which is a bit problematic
<ZirconiumX> Or at least, hard to debug
<daveshah> opt_clean -purge removes aliases
<ZirconiumX> That's so much better, thank you
<pepijndevos> Nice nice
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<pepijndevos> I wonder if it'd be hard to turn symbiyosys into a Python package you can just pip install.
<pepijndevos> Well, I know that part is easy because there is already a PR for it.
<pepijndevos> What I was actually thinking about is bundling solvers with it.
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