clifford changed the topic of #yosys to: Yosys Open SYnthesis Suite: http://www.clifford.at/yosys/ -- Channel Logs: https://irclog.whitequark.org/yosys
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<kergadon> I have a question about nextpnr is this the right place to ask?
<daveshah> sure
<kergadon> So this is probably a hilarious level of overkill for the task but I was thinking about trying to adapt nextpnr to route belts in factorio. Would it work to write a custom architecture to accomplish this largely useless task?
<daveshah> kergadon: for this kind of small, simple system, the Python-described generic architecture is probably better than a full custom arch
<tpb> Title: nextpnr/generic.md at master · YosysHQ/nextpnr · GitHub (at github.com)
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<daveshah> There's an example here https://github.com/YosysHQ/nextpnr/tree/master/generic/examples - although you could probably skip the packing parts if your netlist isn't LUTs in the first place
<tpb> Title: nextpnr/generic/examples at master · YosysHQ/nextpnr · GitHub (at github.com)
<ZirconiumX> And here I was thinking targeting Yosys for 7400 logic would be a stretch
<kergadon> I wanted to try to do the most ridiculous factorio centered project I could think of.
<kergadon> This all started when I started exploring the math behind the more complex belt balancers.
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<kergadon> daveshah, thanks
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<zignig> tinyprog -b
<zignig> oops :) , wrong window
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<ZipCPU> zignig: I do it all the time ;)
<zignig> just reading your entry on skid buffers , very interesting.
<zignig> I might give a nMigen version a go.
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<ZipCPU> zignig: Wow, those two really follow one another ... ;D
<zignig> been noodling with nmigen for a while , looking for constructs to try. ;)
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<pepijndevos> Whoa... factorio place and route... that's pretty funny
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