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<
awygle >
yosys doesn't support "protected" verilog files does it?
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mwk >
of course not
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<
awygle >
figured, thought i'd ask
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<
daveshah >
Test passed
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<
sorear >
huh, the logs are down
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daveshah >
I think tim runs a log too
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<
thardin >
just dropped off my ice40 based lock-in amplifier thingy at uni for feedback
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<
tpb >
Title: Wednesday, 2020-09-16 (at logs.timvideos.us)
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<
awygle >
when you're not using multiclock, how do you specify the timestep yosys formal should use? i have some delays that are specified in nanoseconds that i want to prove hold
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<
awygle >
currently it seems to be using 100 MHz but idk if that's stable
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