<ZipCPU>
awygle: When not using multiclock, the formal timestep is just that: a formal timestep. It has no real absolute time to it, in spite of the plotting at 100MHz.
<ZipCPU>
Just count clocks and do the conversion
<awygle>
ZipCPU: how do i do the conversion without knowing how to convert clocks to time?
<ZipCPU>
I'm confused--Why wouldn't you know how to do that?
<ZipCPU>
Do you not know your clock period?
<awygle>
because there's no frequency, it has "no real absolute time"
<awygle>
as you just said
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<ZipCPU>
So, the trace has "no real absolute time", but you know the clock rate the trace will be applied to
<ZipCPU>
Don't you?
<awygle>
so you're saying, if i intend my controller to run at 200 MHz, then to confirm that i've waited at least 100 ns, i should confirm i've waited at least 20 cycles, and just ignore that the vcd displays that as 200 ns
<awygle>
i guess that's not unreasonable, just somewhat confusing
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<ZipCPU>
awygle: Yeah, that's what I'm saying.
<ZipCPU>
I've been wondering myself if there's a way to adjust the timestep in the VCD file, but I haven't dug into it to see if it's possible or not yet
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