<whitequark> azonenberg_work: how do you handle enumeration of adapters?
<whitequark> azonenberg_work: also jtaghal currently doesn't build
<azonenberg_work> Testing...
<azonenberg_work> whitequark: There is no standardized enumeration API, thats one of the things i'm in the middle of refactoring
<whitequark> ok
<azonenberg_work> These static functions are used for enumeration
<azonenberg_work> if you implement your own copy
<azonenberg_work> but the enumeration code has to manually be patched to call each class
<azonenberg_work> that needs to get fixed
<whitequark> azonenberg_work: can you give me write access to jtaghal-cmake too?
<pie__> azonenberg_work, do you know anyone who has homecmos ops?
<azonenberg_work> pie__: no
<azonenberg_work> i havent touched it in ages
<azonenberg_work> whitequark: on it
<pie__> azonenberg_work, did you ever have ops?
<azonenberg_work> pie__: i think so? dont remember and dont have time to do much there
<azonenberg_work> maybe in a few months when i'm moved in
<pie__> well it might be enough to just give someone op privs
<pie__> 8probably enough
<whitequark> azonenberg_work: is jtaghal multithreaded?
<azonenberg_work> whitequark: Define multithreaded
<azonenberg_work> There is basically no global state
<whitequark> do I make a libusb context a static member
<whitequark> ok
<whitequark> so no
<azonenberg_work> Generally speaking adapter objects are not thread-safe
<azonenberg_work> But you can have multiple objects in different threads without issue
<whitequark> alright
<whitequark> azonenberg_work: remind me
<whitequark> if I throw in a constructor, does my destructor get called?
<whitequark> see this is why I think constructors that do nontrivial work like IO are wrong
<azonenberg_work> whitequark: I generally dont do heavy work in constructors
<whitequark> but jtaghal's API makes me to
<whitequark> since it doesn't have an Open() method
<azonenberg_work> Hmm
<azonenberg_work> But yes, it should unwind properly and call the destructor
<azonenberg_work> i think?
<whitequark> ...
<whitequark> exactly
<azonenberg_work> sorry i'm kinda busy with something else
<whitequark> the problem is I can't easily unwind anyway
<whitequark> because libusb doesn't use RAII
<whitequark> sigh
<whitequark> ok
<azonenberg_work> I'm open to some refactoring along those lines
<azonenberg_work> as far as splitting construction and opening
<azonenberg_work> that's what a lot of my newer APIs have done actually
<azonenberg_work> And it would be pretty easy to fix
<whitequark> ok
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<awygle> has anyone played with these redpine signals wifi chips?
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<rqou> wait, i definitely added not-blob support to jtaghal
<rqou> azonenberg_work, whitequark: ^
<rqou> did this not get merged?
<rqou> did i not even remember to push this?
<whitequark> not-blob?
<whitequark> oh
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<openfpga-bot> [jtaghal] whitequark pushed 1 new commit to master: https://git.io/fARYm
<openfpga-bot> jtaghal/master ac0d61d whitequark: Fix SWDInterface::?PRegisterWrite.
<rqou> it just never got merged
<rqou> but i have tested it and it seems to work
<rqou> and yes, it duplicates a lot of code
<rqou> part of the reason why i keep saying that azonenberg's abstractions aren't amazing
<sorear> fun fact: if you create an object in a github "fork", you can access it by full hash in any related repository
<openfpga-bot> [jtaghal] whitequark pushed 1 new commit to master: https://git.io/fARYg
<openfpga-bot> jtaghal/master b0c63e4 whitequark: Add Glasgow support (untested, gateware doesn't exist yet).
<whitequark> ok, now gateware
<pie__> huh. https://twitter.com/TheRegister/status/1037063304856969216 "Wayback Machine is legit evidence, appeals court rules" my question is, does it have any actual assurance of integrity (did not read article)
<rqou> sorear: not too surprising considering that afaik github treats basically everything as a unified content addressable memory with permissions added
<sorear> networks are real though, you can't access llvm commits from torvalds/linux
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<lain> yeah I learned that (re: access a git object via hash) recently when I noticed a certain vendor pulled a patch from one of their repos, rewriting history, but if you know the hash it's still accessible on github
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<pie__> sorear, yes i think i ranted about that at some point
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<azonenberg_work> rqou: i may have never merged it?
<rqou> you didn't
<rqou> it's pr#3
<azonenberg_work> ah ok, i guess i probably didnt have time to review it
<azonenberg_work> I can look at it tonight or something?
<rqou> although the amount of copypasta isn't great
* azonenberg_work offers rqou some cool beans and awesomesauce
<azonenberg_work> On a bed of copypasta
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<whitequark> lol
<rqou> whitequark: did you try to send me something or did you just send me only an otr finish?
<rqou> i should seriously just disable OTR, this is such a pain
<whitequark> rqou: OTR finish
<rqou> seriously also considering migrating to the rather poor practice of just terminating otr on my bouncer
<rqou> why johnny still still still still still still can't encrypt?
<rqou> although signal et al between only two users is much better
<whitequark> signal has group chats now
<whitequark> kind of flaky but they work ime
<rqou> how does key management work?
<whitequark> dunno
<rqou> i thought that was the problem?
<whitequark> axolotl solves it somehow
<whitequark> otr can't
<rqou> lol
<rqou> "When sending a message to a group, we simply deliver a pairwise encrypted message to each member of the group."
<rqou> (with optimizations)
<whitequark> oh.
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<whitequark> azonenberg_work: ping
<whitequark> or maybe rqou?
<rqou> ack
<whitequark> rqou: do you know swd
<rqou> lol not really
<rqou> i only use it
<whitequark> i mean basics
<whitequark> oh
<whitequark> dang
<azonenberg_work> whitequark: back
<rqou> a bit more familiar with jtag
<whitequark> azonenberg_work: i made the gateware and it seems to work
<whitequark> looking at the LA right now
<whitequark> azonenberg_work: do I understand it right that master setups on rising clk edge and samples on falling clk edge?
<whitequark> or well, doesn't matter if master or not
<azonenberg_work> I would have to go back and re-read the timing diagram
<whitequark> the timing diagram seems to imply that
<whitequark> but they never say it explicitly
<rqou> i'm always amazed when "serious" people cannot draw proper timing diagrams
<azonenberg_work> whitequark: see the note at the end of 4.3.1
<whitequark> well this is stupid
<whitequark> " Contact ARM if you require more information about timings of the serial
<whitequark> connection to the SW-DP"
<whitequark> ok, found a bug with parity calc
<azonenberg_work> whitequark: also sorry i am a bit behind schedule, dont think i will have time to do any swd testing tonight
<whitequark> aw, ok
<whitequark> if you just hook it up it'll still help a lot
<azonenberg_work> well the missing logic right now is the stuff to bridge from the swd link layer to the existing ADI protocol stack
<azonenberg_work> Shouldnt take long but i dont have time tonight :(
<azonenberg_work> i have some stuff to do for a paying customer (yes, those get priority lol) and then need to sleep before my dentist appt
<whitequark> alright
<whitequark> ok let's test this
<whitequark> sigh, more microsoldering
<whitequark> why does my life involve so much microsoldering
<whitequark> also, what sort of sick fuck places two testpoints between three 0603 caps so that you can't access them from like, any part of the board?!
<Ultrasauce> probably a sick fuck that makes a lot of pogo pin jigs
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<whitequark> lol indeed
<whitequark> ok in theory this works
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<whitequark> oh god damn it
<whitequark> rqou: guess what there is on the SWD lines.
<azonenberg_work> pullups? :p
<whitequark> exactly.
<whitequark> a pullup and a pulldown.
* azonenberg_work gently grabs whitequark and points them towards a starshipraider io cell
<rqou> wait there are?
<azonenberg_work> :p
<rqou> well i didn't use any and my SWD still works so i guess they're not mandatory
<whitequark> azonenberg_work: well glasgow revB is in the works
<whitequark> and revC will have a better IO cell
<rqou> still need to make Gurens that wreck Glasgows :P
<whitequark> one thing at a time...
<rqou> inb4 giant pizza :P
<rqou> oh wait idk if you've ever actually watched this
<whitequark> nope
<rqou> tldw pizza hut japan sponsors the revolution :P
<whitequark> wtf
<rqou> it's hastily removed in the american version
<whitequark> *what
<whitequark> ok it works now
<whitequark> with some awful hacks and a level shifter
<tnt> Mmm, why do I get a latch inferred for https://pastebin.com/mdsyiPCK by yosis ? ( Latch inferred for signal `\iua_fifo.\isr_in_mux' from process `\iua_fifo.$proc$iua_fifo.v:93$29': $auto$proc_dlatch.cc:409:proc_dlatch$353 )
<whitequark> oh of COURSE the timing diagrams are backwards in the ADI
<whitequark> http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0517b/CIHBIEHF.html
<gruetzkopf> comes from driving on the left side :P
<whitequark> LOL
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<whitequark> >The probe outputs data to SWDIO on the falling edge of SWDCLK. The probe captures data from SWDIO on the rising edge of SWDCLK. The target outputs data to SWDIO on the rising edge of SWDCLK. The target captures data from SWDIO on the rising edge of SWDCLK.
<whitequark> was this so hard to put in your doc, ARM
<whitequark> hm
<whitequark> NOREPLY.
<whitequark> weirrrd
<whitequark> maybe it *is* fused off?
<whitequark> or maybe I should have just tested SVD on a known good something
<whitequark> azonenberg_work: do I have to do anything else to make SWD work?
<whitequark> like reset the target?
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<whitequark> hm
<whitequark> either I tragically misunderstand how SWD works
<whitequark> or it's fused off
<whitequark> or this chip doesn't work like described
<whitequark> ohhhh
<whitequark> I need to attach Rd/Rd
<whitequark> wow, local electronics retailer doesn't have *any* USB C stuff
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<whitequark> god I hate USB C even more now
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<rvense> whitequark: i wonder when it'll be replaced... and how the "but there's only one cable!" crowd will justify it
<sorear> don't worry, USB 4 will have D+/D-, the SuperSpeed lines, CC, *and* a single-mode fiber for 100Gbit operation
<sorear> or maybe one of those fancy sommerfield-goubau things
<Prf_Jakob> There is going to be a lot of alternative mode cables in the future.
<zkms> sorear: please don't give them ideas.
<rvense> Prf_Jakob: yes but they all have the same physical connector which is good
<Prf_Jakob> I mean I love the USB-C connector I'm not so sure about the whole same physical connector. Like I wondered why my RealSense Depth Camera wasn't working. The cabel I used was just a charging cabel.
<Prf_Jakob> Enough bandwidth to get the OS detect it, but not enough to get it to work or update the firmware.
<tnt> esden: if you're interested in debugging USB, I just made myself a 2-bit logic analyzer with the UP5k that samples at 100 MHz, RLE compress and sends to the PC via serial, streaming directly into sigrok with live USB decoding :)
* gruetzkopf replaces CC signaling with actual shared-bus ethernet
<whitequark> tnt: ha, nice
<whitequark> I should finally make a LA applet for Glasgow :p
<openfpga-github> [Glasgow] whitequark pushed 2 new commits to master: https://github.com/whitequark/Glasgow/compare/00882fc84138...9c877c70b43c
<openfpga-github> Glasgow/master 9c877c7 whitequark: applet.spi.flash_25c: add a command to perform a RMEW cycle.
<openfpga-github> Glasgow/master 9e3994f whitequark: applet.swd: new applet.
<tnt> whitequark: ah yeah, that would be more practical on a glasgow, here I have a USB serial converter hanging off an upduino :p
<travis-ci> whitequark/Glasgow#40 (master - 9c877c7 : whitequark): The build passed.
<whitequark> tnt: much faster too
<whitequark> I can saturate an USB2 link with Glasgow
<whitequark> unfortunately... the UP5K isn't quite fast enough for this
<whitequark> how did you even manage to make it run at 50 MHz?
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<tnt> whitequark: I used icecube :/
<tnt> whitequark: arachne-pnr gives me 35 MHz
<tnt> next-pnr crashes.
<whitequark> tnt: awww
<whitequark> nextpnr is going to give you about the same freq tbh
<whitequark> based on my experience
<whitequark> also, do report the crash, they fix them very quickly
<tnt> mm, actually no ... it's the same error message but I don't have a SB_GB manually instanciated.
<tnt> whitequark: but I'm pretty sure it would run just fine at 50 ... the 'typical' timing vs 'worst' case timing are hugely different and I'm not running it undervolted at 85C.
<whitequark> tnt: hrm
<whitequark> I can only really choose between 30 and 48
<whitequark> ok, I can use the PLL but that costs me one channel
<tnt> well, 48 would really be more appropriate tbh, but I only had a 10 MHz can crystal on hand :p
<whitequark> tnt: on Glasgow I'd just add an NRZI decoder
<whitequark> and stream USB packets directly
<whitequark> this way you only need like 1.5 Mbps for low speed
<tnt> Well, I wanted to be able to see bad packets to spot bugs at the physical layer, so I can't do any processing ...
<tnt> That's also why I was sampling at 100 MHz to try and also see what the timing looks like as accurately as I could achieve.
<whitequark> ah ok
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<tnt> whitequark: are you selling glasgow boards btw ?
<shapr> enquiring minds want to know
<shapr> bonus money for autographs :-P
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<GuzTech> Yeah, I asked that on Twitter a couple of days ago as well. I'll gladly take one (with an autograph) :D
<whitequark> tnt: not yet
<whitequark> we're going to go through revB and revC first
<whitequark> once revC works reliably with the new I/O cell, it's ready for production
<GuzTech> \o/
<tnt> new IO cell ?
<whitequark> tnt: yes. one that tolerates pullups/pulldowns
<zkms> what are differences between revA and revB and revC besides I/O cell
<gruetzkopf> "signature edition" glasgow :D
<whitequark> zkms: revC has a larger and faster FPGA
<whitequark> because right now we're using all the I/O on the FPGA we have on revA/B
<whitequark> howerver, revC's FPGA is only available in a BGA
<zkms> oh which FPGA are you using for revC?
<whitequark> well that or an incredibly large TQFP, which is even worse
<whitequark> HX8K
<zkms> oic nice
<pie__> 8k should e enough for anyone! ;>
<pie__> *4k
<gruetzkopf> huge TQFP are quitre annoying
<tnt> no SPRAM though :(
<whitequark> tnt: I haven't used SPRAM so far at all
<whitequark> see the thing is
<whitequark> I can put 8 bits per cycle into the FX2 FIFO, every cycle, at 48 MHz
<whitequark> and only barely saturate the USB bus
<whitequark> about 300 Mbps of real bandwidth with bulk packets is achievable
<whitequark> so there's not very much point in using SPRAM since you can't use it to implement internal FIFOs any better than you can unload data into small DPRAM FIFOs and then to USB
<tnt> whitequark: true, for this, you ahve the FX2 to unload things fast :)
<azonenberg_work> whitequark: re no reply
<azonenberg_work> it's possible this is a SWDv2 part that starts out in dormant mode
<azonenberg_work> or a SWJ-DP that needs the switching sequence
<azonenberg_work> (or fused off, or the "SWD" port is not actually arm serial wire debug)
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<whitequark> azonenberg_work: could be SWDv2
<whitequark> SWJ-DP should have been switched by the link reset, no?
<whitequark> azonenberg_work: how do I take SWDv2 part out of dormant mode?
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<zkms> gruetzkopf: where is that from~?
<gruetzkopf> silicon graphics origin 2000 programmers manual
<gruetzkopf> irix7.com/techpubs/007-3410-001.pdf
<q3k> gruetzkopf: what the fuck is this shit
<gruetzkopf> SGI Origin2000 CPU-HubIO space ->XIO bus space translation
<q3k> jaysus
<whitequark> azonenberg_work: oh found it
<gruetzkopf> (as each card of the 16 cards per node has a 16G window but there was only space for a 4G window per node)
<q3k> gruetzkopf: i'm somewhat sad I never got to play around with SGI madness
<q3k> gruetzkopf: (when it was relevant)
<gruetzkopf> i have two onyx2 cubes at home
<q3k> what's the german word for fake nostalgia towards batshit crazy architectures with extremely wide parallel buses?
<gruetzkopf> this one is not batshit-crazy-wide-parallel-SMP anymore
<gruetzkopf> point-to-point links, 8b or 16b wide per dir, NUMA
<gruetzkopf> if i'm crazy enough i'll bring one and a projector to c3
<sorear> mm TLPs
<awygle> the difference of rev B is "bugs are fixed". which is mostly adding termination to the DUT ports.
<awygle> (at least this is the theory)
<q3k> gruetzkopf: please do :D
<gruetzkopf> these are the "small" version which also exists as a desk-side thing, max 2 nodes, max 2 rasteriser boards
<q3k> gruetzkopf: I can only offer Itanium2s in return :P
<jn__> playing glquake like it's 1996
<gruetzkopf> to get more compute or raster power you need two boxes
<gruetzkopf> (one with 4 nodes and 0 graphics, and one with 0 nodes and 6 graphics)
<gruetzkopf> GLquake (well, sgiquake) works *extremely* well on these
<gruetzkopf> 1920x1080@60+60, vsync, stereo3d is no problem
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<tnt> whitequark: If you're interested to have a look: https://github.com/smunaut/iua
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<awygle> yo azonenberg_work, does multech have an annular ring spec? can't find it
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<gruetzkopf> (if anyone wants machine time on that thing, poke me c,c++,f77 compiler is licensed 4CPU, 4GB ram)
<shapr> is there some kind of offbeat hardware coop here on ##openfpga?
<shapr> if yes, I need to add my risc-v board to the collective resources
<shapr> and my ps3 that boots yellow dog linux
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<rqou> whitequark: is this the thing you were talking about 2018 edition breaking? https://users.rust-lang.org/t/module-system-changes-are-going-into-fcp/20171
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<whitequark> breaking?
<whitequark> where?
<rqou> you were mentioning that some feature would be breaking some use case related to modules or build systems or something like that
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<rqou> i proposed "meh, just make a wrapper crate that doesn't opt into 2018 and just re-exports everything" and you got unhappy with me :P
<q3k> gruetzkopf: gib
<q3k> gruetzkopf: https://q3k.org/pubkey
<q3k> gruetzkopf: IRIX 6.5?
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<gruetzkopf> irix 6.5, not perma-on, no sshd yet :P
<gruetzkopf> do you participate in dn42?
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<q3k> gruetzkopf: no, I have my own little dn42 thing with friends
<q3k> gruetzkopf: but I can set it up if you want
<q3k> gruetzkopf: anyway, no rush, right now I don't have time to mess around anyway
<gruetzkopf> yeah i need to poke it some more and do something about the power consumption
<gruetzkopf> i need to test power draw if i only run CPU nodes in one of them
<gruetzkopf> (and no gfx subsytem)
<TAL> gruetzkopf: might be easier to get a flatrate tariff from your utility than trying to have one or more MIPS beasts running in a energy efficient manner :P
<rqou> just move it here to the US where electricity is cheap :P
<shapr> and internet is expensive
<rqou> oh yeah that's true
<rqou> hmm
<gruetzkopf> is electrictiy at least 1 OOM cheaper?
<rqou> be like lain and make friends with people running a datacenter?
<TAL> true, but flatrate tariffs (usually to avoid all the taxation) are pretty common for bigger offices
<rqou> gruetzkopf: idk, how much is electricity in Germany?
<TAL> hm how common are big powerlines to houses in the suburbs
<TAL> ~30ct/kWh, at least 12-15ct are just taxes on it
<gruetzkopf> our home feed is 3*125A
<shapr> It's a real pain to get enough 220v into a US home to feed a bladecenter as well as washer/dryer.
<rqou> supposedly average California electricity is 16c/kwh
<TAL> i think if you use more than 7.5MWh anually the taxes will lower to something like 8ct/kWh
<rqou> can be even cheaper in other states
<TAL> DB pays still pays 1-2 ct/kWh on traction energy
<gruetzkopf> one of my clients is at like 500MWh/year, my business is at 20MWh/year
<TAL> just think about a train accelerating from a station
<shapr> avg is $0.10 for the US, and the coasts are a bit more expensive
<gruetzkopf> (at 16MW power consumption for the typical 2*class403 EMU set)
<sorear> how many EMU sets do you have at home
<gruetzkopf> zero
<gruetzkopf> though i do have a complete drivers cab out of a class 420 EMU
<rqou> solution: be like bart and use DMUs instead :P
<gruetzkopf> bart-ext is stadler DMUs?
<sorear> i know bart has EMUs, DMUs, and cable cars, do they also have locomotives in the mix
<sorear> eBART/Antioch is DMUs (and standard gauge!!!!!!)
<gruetzkopf> (stadler GTW DMU iirc)
<gruetzkopf> i much prefer their FLIRT or KISS lines of EMUs
<TAL> i hope GTOs
<gruetzkopf> TAL: if i have to choose from stadler trains
<rqou> oh yeah bart extension is kinda hilariously out of place
<rqou> it basically looks like somebody transplanted in a segment of European rail
<TAL> https://www.youtube.com/watch?v=ZL64KL89Cf8 i gonna just leave this here
<gruetzkopf> b-field probe
<TAL> i mean litton was one key driver for designing/building BART, they really took a lot of ideas from the tube
<rqou> except they also had to NIH everything
<rqou> leading to fun things like a European train company teaching them how to improve their rail profile
<rqou> in case you ever wondered why bart is loud as shit, this is why
<TAL> meanwhile in berlin they still don't care at all and need to replace the tracks every 10 years
<rqou> define "need to"
<rqou> bart has "needed" upgrades since at least the 1980s
<rqou> doesn't mean they performed any
<TAL> vibrations from a running train on it causes damage on the structures above? :D
<rqou> for bart? doesn't matter lol
<rqou> the majority of the tracks were purposely built where poor people who don't have influence live
<sorear> ah, the exact opposite of boston
<rqou> i didn't say the stations lol
<rqou> just the tracks
<rqou> yes, this is typical for the bay area
<sorear> we physically removed a rail line, including the tracks, from the main black neighborhood at great public expense in the 80s
<rqou> oh lol
<sorear> none of the lines that exist go much more than 2mi without astop
<rqou> i mean, racist urban planning takes all kinds of forms
<sorear> (the washington street el)
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<rqou> so, very troll/drama question: where do Europeans manage to channel their racism? it seems it's at least more subtle over there
<sorear> right now it's mostly directed at Syrians no?
<gruetzkopf> there's plenty of (neo)nazis around, mostly in the ex-GDR states, blaming refugees for everything
<TAL> otherwise for the most part people from lower groups (income; education) people tend to have a bias and worrying (for whatever reason) that the social system gets exploited
<gruetzkopf> (while having no qualms about doing exactly that
<qu1j0t3> sorear: bingo
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<TAL> and sadly for the most part unnoticed the classic bullshit in shitty newspapers when a person vomits at the central station putting headlines out "Guy (42) vomits at the central station; will he spread <rare illness>?"
<TAL> something like this is even more directed to people with darker skin colors; prob. assuming that he comes from africa
<TAL> kinda horrifying that such things fall under press freedom
<rqou> what about racist urban planning? i mostly only hear about that in the US
<pie__> is detaching 2/3rds of a country after wwii racist urban planning? :P
<TAL> i think that really depends, social housing helped to avoid build such classic US-alike ghettos; ofc there are hotspots and clustering of less educated or people with problems with their social status and thus more crime/problematic situations but at least to my knowledge the services provided from the gov. are usually the same
<TAL> which includes public transport and other stuff
<TAL> ofc there might be some examples of a right-wing mayors which did block/racist stuff on purpose
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<TAL> no idea about france, tbh
<shapr> Sweden had free university. Took me five years to pay off my $35k student loans here in the US
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<pie__> azonenberg_work, dont want to nag you, just didnt get an answer last time; if you do have op capability, could you perhaps extend it to someone else in the homecmos channel?
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