<pie__>
thin film resistors may not like esd? (not entirely surpisig?)
<pie__>
im not sure if im reading figure 2 right, 1% change in resistance at ~ 3700V ?
<tnt>
pie__: this is what I was proposing : https://sketch.io/render/sk-a20cf08113c05f5faf15957dee49ac3a.jpeg TVS will eat up most of the pulse. That's what they're designed for ... then the R + internal diodes of the device should be able to handle whatever clamped voltage the TVS diode left.
<pie__>
tnt, yeah thats roughly where my minde ended up
<pie__>
my question that was left was how to choose the resistor value
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<pie__>
for positive swing voltage signals apparently unidirectional diodes are fine...so i guess i misunderstood something there *keeps reading*
<pie__>
damnit i was typing up a summary to make sure i got things right and my irc client cleared it for some reason... :(
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<pie__>
tl;dr: unidirectional esd diode normally works in reverse bias, the breakdown voltage specifies the overvoltage. it works in forward bias for negative esd voltage. a resistor in series with the data line can be used to limit the current
<pie__>
the reason for working in reverse bias seems to be lower leakage current?
<pie__>
given "voltage breakdown" specifies the protected voltage, im not sure what the point of a "reverse standoff" value is?
<pie__>
or is it just removing the uncertainty in "operate at some value smaller than the breakdown voltage"
<pie__>
couldnt you work at *any* value below the standoff voltage?
<sorear>
you work in reverse bias because you don't want "normal voltages" to cause conduction
<sorear>
modern inter-chip logic is 1-2V and silicon diodes will forward conduct at 0.7V
<pie__>
sorear, ahhhhhh, for some reason i figured the forward voltage would be the same as the reverse, derp
<pie__>
just because both protections protect you from ESD doesnt mean they have the same operating voltages, derp
<pie__>
*both directions
<sorear>
not clear if your application is using zeners or normal silicon diodes (~300V reverse breakdown)
<pie__>
300V sounds a bit much for 5v logic stuff :D
* pie__
is operating in low voltage regions
<sorear>
sure, but if you're starting with a multi-kV ESD source it's a significant improvement
<pie__>
sorear, i dont follow
<pie__>
oh you mean 300v is still better than 30k? :p
<pie__>
i did read something about two stage stuff but i doubt i need anything like that
<sorear>
think of it like a mars landing. there is no one technology that (a) can survive a 10+ km/s entry (b) can get you to a <5 m/s terminal velocity
<pie__>
hmm yeah orders of magnitude makes sense
<pie__>
*orders of magnitude of operation
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<pie__>
also it turns out its "clamping @ ipp" which means peak current. so thats the actual maximum voltage I think. so...it conducts at breakdown but can reach the clamping voltage...? that seems a bit weird but it makes sense on the diagram. so I guess I need to think about that.
<pie__>
ok, thanks for all the help guys, i think i can finally make some sense of this
<_whitenotifier>
[whitequark/Glasgow] whitequark pushed 3 commits to master [+3/-0/±3] https://git.io/fpoZq