<pepijndevos>
I did it twice to make sure it worked
<trabucayre>
just twice ? ;-) I've stopped to count after 2^n :)
<trabucayre>
I've tried to search for the bug... I've read pnr json... But ...
<trabucayre>
I suspect shift register to be never set with default value... Used an input pin instead of my reset code... Seems never taken into account
<pepijndevos>
I'm looking at your code now. First thing is I think write a testbench to rule out code bugs. Or synth with another toolchain to confirm toolchain bug.
<pepijndevos>
Yea maybe lemme try with Gowin vendor tools
<trabucayre>
with gowin tool it's works... (tested this morning)
<pepijndevos>
oh okay hmmmm
<pepijndevos>
and with using a reset button rather than your reset code?
<trabucayre>
but try too, to confirm/infirm my conclusion
<pepijndevos>
will do
<trabucayre>
reset do nothing
<trabucayre>
I've changed a bit the design, with something like blink
<trabucayre>
my reg is (theorically set) to 0x01 so {~ctr_q[1], ~ctr_q[0]} must do opposite led state
<trabucayre>
both led are on or off at the same time ...
<trabucayre>
I suspect a missing mux before DFF
<pepijndevos>
Ok yea can confirm your code works with vendor tools and does not with Apicula
<pepijndevos>
Awesome!
<pepijndevos>
I love how small and broken this example is.
<trabucayre>
if the init is not done correctly (ie all 0 instead of 8'b1) shift reg can't work
<pepijndevos>
Yea true
<trabucayre>
I've tried reg [7:0] ctr_q = 8'b1; same result...
<pepijndevos>
uhhh I'm trying with async reset to rule out a clock bug and still no sign. Like... in that case it should be just button->load 8'b1
<pepijndevos>
still works with vendor tools so I did not introduce any new bugs
<pepijndevos>
Now it's getting fascinating!
<pepijndevos>
Next bet is it's either a bug with aliases and the "diagonal" wires, something with edge wrapping, or the IOs. Historically speaking...
<trabucayre>
Yes. I've spent my day to check all possible solution to reduce bug...
<pepijndevos>
I'm kinda relieved it appears to be not a clock bug.
<pepijndevos>
I'll do a bit more prodding, but will probably take a honest stab at it Wednesday or so.
<pepijndevos>
Sometimes I feel like I should write some LVS tools for synthesis output vs bitstream decoding to see if there is a fuckup there
<trabucayre>
sometime a tool to debug is useful :)