<awygle> marcan: re: the PPU board for byuu: i just learned that that PSoC5LPs are 1.71 to 5.5 volts, up to 4 power domains. might be good level shifting options. dropping this info here as much to remind myself as to let you know :p.
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<esden> Hey! (Probably mainly a question for marcan) I have a question about how you would like me to submit PCB changes. I have located a few things that I would like to change before ordering the next revision of the board, to improve manufacturing reliability. Things that I figured out in the last run. The main things to change are: Remove grounding pads under the ESD diodes. Change the SOT-666 footprint to make sure there is
<esden> solder stop between the pads. Change all remaining rectangular pads to roundrect for better solder coverage. (and better looks ;) ) I also have some cosmetic changes I would like to make. Like making slight changes to Hana so that she looks right on white/light solder stop, making her an outline without filled polygons (I created that version already just not pushed to the repo yet.). Add an anchor footprint for the
<esden> manufacturer information. Should I just make a fork on my own repository and start committing those changes? Also should we bump the revision number of the board before or after I do the changes? Just for reference here is my branch so you can judge what I was up to: https://github.com/esden/Glasgow/tree/revC2
<esden> Sorry for the massive block of text... ;)
<whitequark> grounding pads and SOT-656 footprint are clear DFM improvements that should definitely go upstream here
<whitequark> what's an anchor footprint?
<whitequark> cosmetic changes like rect->roundrect i think are best kept to the vendor fork, since we're trying to stay close to upstream KiCAD repos where possible
<whitequark> sometimes it's just not practical because they (understandably) don't want a million footprint variants for cheaper processes, and we (understandably) don't want to use footprints that decrease yield with 5/5 rules
<esden> I will cross check the footprints I have against the newest versions in the kicad library. I think the librarians did make some improvements since the version included in the current stable.
<whitequark> updating footprints to match kicad libraries is always super welcome.
<esden> I am trying to stay as close as I can to the up stream libraries. I will have to do some research how many of the changes I want to make can be sent up stream. Indeed the desire is there to push as much as possible up stream. But I have to also be bit careful to not delay other timelines with that desire. :D
<whitequark> yes, that makes sense
<esden> ohh right. Anchor footprints: small placeholders that can be replaced with a silkscreen footprint or text. Essentially as a coordinate placeholder so that the logo or text can be added in a more automatic manner before generating gerber files for manufacturing.
<whitequark> gotcha. that would be good to have upstream.
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<_whitenotifier-3> [GlasgowEmbedded/glasgow] whitequark pushed 1 commit to master [+0/-0/±1] https://git.io/JvnHd
<_whitenotifier-3> [GlasgowEmbedded/glasgow] whitequark fd03951 - applet.interface.i2c_target: fix test.
<_whitenotifier-3> [GlasgowEmbedded/glasgow] whitequark pushed 1 commit to master [+0/-0/±1] https://git.io/Jvn7m
<_whitenotifier-3> [GlasgowEmbedded/glasgow] whitequark b317e45 - applet: migrate to nmigen, fix coroutine-related issue.
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<furan-> hio
<furan-> anyone want to sell me a glasgow board?
<furan-> :-)
<furan-> I signed up for the production version
<whitequark> btw it would't quite help you with the intel board
<whitequark> because of the large amount of pins on that connector
<furan-> I was thinking for just the 4 pins. unfortunately the board is made using the high density interconnect process, the layers are *crazy* thin and the pads are very very fragile
<whitequark> ah yeah
<whitequark> magnet wire seems the way to go for this
<furan-> yeah, taht's what I used last time
<whitequark> i normally use PTFE insulated wire but that has enough springback it can tear off pads
<whitequark> well
<whitequark> it can tear off 0.5 mm pitch BGA pads, which are a bit smaller than what you have there
<furan-> actually I think I used PTFE/bodge wire last time, not my magnet wire. I'd remember the polyurethane enamel smell if I'd used magnet wire.
<furan-> but I have magnet wire, will use it this time, good idea
* furan- decides to idle in here
<_whitenotifier-3> [glasgow] emilazy opened issue #182: gateware.analyzer: FIFO tests are broken - https://git.io/Jvnd5
<_whitenotifier-3> [glasgow] emilazy opened pull request #183: Add test runner script and disable broken tests - https://git.io/JvndA
<_whitenotifier-3> [glasgow] emilazy synchronize pull request #183: Add test runner script and disable broken tests - https://git.io/JvndA
<_whitenotifier-3> [glasgow] emilazy synchronize pull request #183: Add test runner script and disable broken tests - https://git.io/JvndA
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<_whitenotifier-3> [glasgow] emilazy synchronize pull request #183: Add test runner script and disable broken tests - https://git.io/JvndA
<_whitenotifier-3> [glasgow] emilazy commented on issue #182: gateware.analyzer: FIFO tests are broken - https://git.io/JvnF4
<_whitenotifier-3> [glasgow] whitequark closed pull request #183: Add test runner script and disable broken tests - https://git.io/JvndA
<_whitenotifier-3> [GlasgowEmbedded/glasgow] whitequark pushed 2 commits to master [+1/-0/±2] https://git.io/Jvnb3
<_whitenotifier-3> [GlasgowEmbedded/glasgow] emilazy f2546d8 - test: add script to run tests.
<_whitenotifier-3> [GlasgowEmbedded/glasgow] emilazy 2a8bfc9 - gateware.analyzer: disable broken FIFO tests.