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<wigyori>
morning
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<Turl>
ssvb: it should work, we unified sun4i+sun5i cpufreq as far as I recall
<Turl>
montjoie[home]: nice speed :)
<Turl>
montjoie[home]: why the difference?
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<ssvb>
Turl: that's good to know, I just wonder if anybody could enable cpufreq on sun5i and confirm that it really works
<Turl>
libv: ^^
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<juanfont>
nove, thanks :)
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<vector80>
Hi everyone, yesterday I fixed my sound PA problem. 1) I modified sunxi-codec.c to allow PA to turn ON when start playing, 2) I had to manually set GPIO PH25 to HIGH under /sys/class/gpio interface
<vector80>
This is clearly meaning that, sunxi GPIO driver seems not working correctly
<vector80>
In my fex files, I tried every possibility to set Ph25 to HIGH by default, and allways failed.
<vector80>
Those [gpio_para] setting only allows me to export the pins, nothing more
<vector80>
It doesn't let me to set them HIGH or LOW by default
<vector80>
Did anybody have any idea, how to make it run correctly ?
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<juanfont>
nove, I'm also trying to make sunxi_mem driver acceptable. but it's my first time messing with the kernel (more or less: http://i.imgur.com/18JXcbk.jpg)
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<Uninstall>
hello
<Uninstall>
has anyone ever tried to create a bootscreen splash for A20 olinuxino?
<Uninstall>
I would like to display an image on the LCD as soon as the system is powered
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<vector80>
Uninstall: I also asked this, and as I understand, it is almost impossible with current u-boot sunxi
<vector80>
My request was similar, but I would like to use HDMI
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<Uninstall>
vector80: did anyone told you why it is impossible?
<vector80>
In my previous jobs, I have done it on CSM1203 by modifying uboot source
<vector80>
Yes, they said they did not implemented it yet
<vector80>
And actually as I understand, nobody requested it
<vector80>
I need to leave now
<vector80>
So sorry
<vector80>
Have a nice day
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<lioka>
got both cpus online on A20 with 3.14 + sunxi-next, by picking from ml u-boot PCSI patches. now can't boot 3.4. oh my.
<wens>
AFAIK they are incompatible
<lioka>
oy wey
<plaes>
yup, incompatible
<maz_>
it would be good to find out *why*.
<maz_>
has anyone investigated the issue? or maybe nobody care enough about the new u-boot / ancient kernel combo?
<plaes>
maz_: read the ml
<plaes>
basically the way that CPUs are brought up was changed
<maz_>
plaes: I know, I wrote the fucking patches.
<plaes>
indeed :D
* plaes
hides...
<maz_>
so, what in the way the CPU bringup changed broke 3.4?
<maz_>
Has anyone tried to compile a u-boot that doesn't switch no non-secure mode, for example?
<Turl>
maz_: maybe the hyp mode stuff
<maz_>
Turl: more than HYP, I'm thinking on non-secure. does 3.4 use the secure memory bank?
<lioka>
if it helps, i've A10 around to check
<maz_>
lioka: unfortunately not, as my patches are only applicable to HYP capable cores (A7, A15...).
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<maz_>
lioka: it would be good if you could back out the patch that says "sunxi: HYP/non-sec: add sun7i PSCI backend", recompile u-boot, and see if that one can boot a 3.4 kernel.
<maz_>
Turl: no, that's the SMP startup code, which is what we already have with the PSCI patches.
<mripard>
wens: hmmm
<mripard>
let me take a look
<lioka>
maz_: lemme try..
<Turl>
maz_: but 3.4 isn't using PSCI; maybe some of that fails if you do it again once uboot does it?
<Turl>
anyway, gotta go :) good luck
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<maz_>
Turl: that 3.4 isn't using PSCI is irrelevant. If you're not using PSCI, it doesn't get in the way. You can still do your own SMP boot. That is, assuming none of the stuff you access requires a *secure* access, and that's what I want to investigate.
<lioka>
maz_: #if 0'd those five #defines in sun7i.h, 3.4 booted ok
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<maz_>
lioka: just what I thought.
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<maz_>
lioka: so some code in your 3.4 kernel requires secure access to some device. would be good to find out what, and why.
<mripard>
wens: yep, sorry, a brainfart :)
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<maz_>
lioka: my guess is that something is using SRAM_B (0x20000 to 0x2ffff), which is reserved to secure mode, and that Linux should never touch...
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<montjoie[home]>
Turl I think the speed gain is due to better clock support
<montjoie[home]>
I could set the SS clock to the maximum
<ssvb>
montjoie[home]: how does its performance compare to software encryption now?
* libv
was out shopping
<libv>
but yeah, i should be able to check a13, i need to test the u-boot and boards patches anyway
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<ssvb>
jemk: hi, any news? :)
<ssvb>
jemk: after a bit more tests, the dram clock speed limit for my CT seems to be indeed around 552MHz with dcdc3 at 1.35v (decreasing voltage or increasing clock speed makes it fail)
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<ssvb>
jemk: so it is something around ~100MHz uplift
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<ssvb>
jemk: have you thought about making the search for optimal tpr3 value fully automated? by making use of a watchdog or something else to reset the hardware on a fatal fail
<ssvb>
jemk: we would need some easy and/or automated way to populate tpr3 settings with the right values for all the boards eventually :)
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<jemk>
ssvb: no news yet, but yes, some automated way would be necessary
<jemk>
ssvb: I still hope that dll_scan_para is fixable
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<hramrach>
hello
<hramrach>
hmm, I need to finish testing of that damn a13 tablet sometime
<hramrach>
I have all these cool cables sticking in all directions from the pcb but cannot get console output except from the SD slot :/
<ssvb>
jemk: the other remaining things are performance tweaked dram timings and more experiments with mbus
<ssvb>
jemk: also testing g2d would be necessary to see if it can keep up, because right now it runs at half of the dram clock
<jemk>
ssvb: g2d seems to keep up, it had no problems when i was trying 600mhz, so more realistic 550 or even lower should be no problem
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<jemk>
ssvb: and for the timing parameters, I thought about writing a function to calculate them on the fly, but it would increase spl size, that could be a problem
<ssvb>
jemk: can the calculation of timing parameters be done at u-boot compile time?
<jemk>
ssvb: why not? it only depends on frequency and dram chip type
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<jemk>
ssvb: is there some use for changeable dram freq at runtime?
<ssvb>
jemk: don't know
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<pirea>
hi
<pirea>
libv are you working at sunxi-kms?
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<jemk>
ssvb: i don't have such big monitors, so i didn't even know such problems exist ;)
<ssvb>
jemk: really? do you have no 1080p monitor or anything larger than that?
* ssvb
finds this unbelievable at this time and age
<jemk>
ssvb: no, i don't. I have high quality 1680x1050 and didn't see a reason to replace them
<ssvb>
jemk: ok, I'll try to run some tests myself
* jemk
waits for affordable high dpi monitors
<ssvb>
iirc, lauri was suffering from occasional display blanking/recovering when running with 1920x1080 screen resolution
<pirea>
:))
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<ccaione>
jemk: you are making me feel bad for having bought today a second 23" monitor
<ccaione>
:)
<pirea>
ccaione :))
<pirea>
acer 23" 1080p
<ccaione>
today a Philips 234E5QHSB
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<libv>
hramrach: which a13 was that again? i remember seeing your name attached to a device page history, but i do not remember which
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<lauri>
wut-wut
<lauri>
ssvb: can I help? :P
<ssvb>
lauri: about the problems with your cubietruck and your monitor
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<ssvb>
lauri: if you want to run some tests, it is possible to clock dram much higher without sacrificing stability by tweaking the dram tpr3 parameter in u-boot (right now it is set to 0)
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<lauri>
in simplified english please :P
<lauri>
What should I tweak exactly?
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<lauri>
You're talking about rising DRAM voltage?
<ssvb>
not at this time
<lauri>
what is this tpr3 then?
<ssvb>
it's the phase shift to sample values from the memory interface the at the right time, this is needed to compensate the pcb tracks length or something like this
<jemk>
I don't know if it is the right value, but it is better then
<ssvb>
at least it's a good approximation of the right value that we know at this moment
<ssvb>
lauri: and then the dram clock can be increased to 480mhz and far beyond
<ssvb>
lauri: it is also a good idea to change the dcdc3_vol from 1250 to 1300 in your cubietruck fex file, this is the voltage increase (approved by allwinner)
<ssvb>
lauri: so just clock dram higher, then check that this higher clock speed is at least somewhat stable by running https://github.com/ssvb/lima-memtester/
<ssvb>
lauri: and finally check if the problems with hdmi signal disruption disappear
<ssvb>
lauri: are you running the latest u-boot now?
<pirea>
in arm negative numbers is represented in complement of 2?
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<ssvb>
pirea: yes, and the same is true for every relevant architecture nowadays