<d1b2>
<286Tech> @whitequark[m]: I've actually never paid attention to it, but when writing the vcd file, does nMigen actually annotate that a signal is unsigned so that gtkwave displays it as unsigned?
<whitequark[m]>
you cannot describe signedness in VCD
<d1b2>
<286Tech> Ah ok, didn't know that.
<whitequark[m]>
if this sounds ridiculous, that's because it is
<d1b2>
<benzn> hehe
<whitequark[m]>
@benzn right, so you're observing correct but unexpected behavior
<d1b2>
<286Tech> It's just the interpretation of the bits.
<whitequark[m]>
nmigen integers (just like most other fixed integers, really) always have the same behavior for +/- regardless of signedness
<d1b2>
<benzn> hmm, so that is to say ipsum - insum is a signed value
<whitequark[m]>
it is not
<d1b2>
<benzn> ah gotcha
<whitequark[m]>
try: (ipsum - insum).shape()
<d1b2>
<benzn> so it's overflowing
<whitequark[m]>
yes.
<d1b2>
<benzn> then abs is doing nothing
<whitequark[m]>
yes.
<d1b2>
<benzn> because it's unsigned
<d1b2>
<benzn> makes sense
<d1b2>
<benzn> thanks for the help!
<d1b2>
<benzn> is there a convenient way to coerce the subtraction into a signed value?
<d1b2>
<benzn> let's try with ipsum and insum signed
<d1b2>
<286Tech> I assume the abs() function performs a two's complement operation based on the sign bit?
<whitequark[m]>
but yes, declaring ipsum and insum in your case might be more appropriate
<whitequark[m]>
not sure what the domain is
<whitequark[m]>
286Tech: abs on signed values is defined as `Mux(self >= 0, self, -self)`
<d1b2>
<benzn> cool, making them signed does what i want (I'm just counting ones masked against another binary pattern, but it's a low number of bits so can deal with the extra sign bit)
<d1b2>
<286Tech> Isn't that a bit (haha) inefficient though? You only need the sign bit.
<whitequark[m]>
benzn: counting ones as in popcnt?
<d1b2>
<benzn> yep
<d1b2>
<286Tech> I don't even know how you'd perform subtraction or abs() on unsigned numbers tbh.
<whitequark[m]>
subtraction of unsigned numbers adds 2's complement and keeps the result unsigned