azonenberg changed the topic of #scopehal to: libscopehal, libscopeprotocols, and glscopeclient development and testing | https://github.com/azonenberg/scopehal-apps | Logs: https://freenode.irclog.whitequark.org/scopehal
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<azonenberg> Sonnet sim of the full AKL-PT2 with an ideal 50 ohm terminator at the tip
<azonenberg> this is the production design using the Er/Df of the coverlay and PCB substrate that i specced in the fab notes
<azonenberg> I don't 100% trust the data yet, and the sim inputs are based on the stackup i specified which is not how it will actually be built
<azonenberg> i'm still going back and forth with the fab but the exact material i wanted is out of stock
<azonenberg> I feel like this model may be underestimating conductor losses
<azonenberg> among other things i didn't model surface roughness of the metal in this sim
<azonenberg> But the model is certainly encouraging
<azonenberg> If true, most of the loss I saw in the original AKL-PT4 was likely due to dielectric losses in the soldermask
<azonenberg> AKL-PT2*
<azonenberg> And switching to coverlay will flatten that out and you'll even see a bit of peaking
<azonenberg> Looking at the sim, the tip side of the probe has a bunch of ripples and a bunch of peaking (around 4 dB @ 10 GHz)
<azonenberg> while the shaft and connector has a strange spike at 325 MHz but is otherwise a smooth rolloff losing about 1 dB at 10 GHz vs at DC
<azonenberg> interestingly, the sim is showing -1.3 dB at 100 MHz (the lowest frequency I modeled). I'm not sure if this is due to some sort of impedance discontinuity or what. Still some questions to be answered before i can be confident in the sim
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<azonenberg> Back
<azonenberg> Comcast link flapped a few times, then my irc client decided it didn't want to resolve any DNS hostnames
<azonenberg> seems the root cause is that my irc vm has only 2GB of RAM and skype + telegram had hogged a bunch
<azonenberg> my messaging vm*
<monochroma> D:
<azonenberg> So my client couldn't fork to launch a dns resolver process
<azonenberg> lol
<azonenberg> Closing skype before reconnecting solved it
<azonenberg> yay for memory leaks
<azonenberg> Anyway, just finished shooting video for a demo of glscopeclient on the waverunner + mso64
<azonenberg> need to edit and narrate but that will probably happen tomorrow, it's getting late
<monochroma> oh cool!
<_whitenotifier> [scopehal] azonenberg pushed 1 commit to master [+0/-0/±2] https://git.io/JLNdM
<_whitenotifier> [scopehal] azonenberg 40d934d - UpsampleFilter: fixed channel scale/range not propagating
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<tnt> azonenberg: do you have a preferred resistor series you use for those passive probes btw ?
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<miek> Vishay FC
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<tnt> miek: tx
<d1b2> <you_snus_you_lose> ordinary 0402 resistors will work fine up to 6GHz
<d1b2> <you_snus_you_lose> return loss of 20-30dB is possible if you flip the resistor upside down
<d1b2> <you_snus_you_lose> the bottleneck is going to be your layout anyway
<d1b2> <you_snus_you_lose> and pcb impedance control is never very good on fr4
<d1b2> <you_snus_you_lose> for a differential probe it really doesn't matter, it's not like you are aiming for 0.05dB flatness
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<azonenberg> you_snus_you_lose: the handheld (non solder in) probe prototypes use FR408HR, the last kickstarter batch used RO4350B
<azonenberg> for the diffprobe i'm aiming to get as flat as i can. Not going to be 0.05 dB but i don't want several-dB spikes
<azonenberg> small differences i can flatten out in post with de-embedding as long as i can characterize the response
<azonenberg> also return loss isn't what matters
<azonenberg> it's flatness of insertion loss
<azonenberg> in particular, higher resistance values (hundreds to thousands of ohms) start coupling between the terminals capacitively
<d1b2> <you_snus_you_lose> well reflections are what causes those ripples in S21 that you see
<d1b2> <you_snus_you_lose> in your last screenshot the ripples are fast-changing vs frequency, which means you have reflections that travel physically large distances
<d1b2> <you_snus_you_lose> for example you have a long transmission line of a wrong impedance, or a badly terminated long transmission line
<d1b2> <you_snus_you_lose> if you want to get rid of those fine ripples focus on the large things, e.g. make sure your long tlines are well matched to the load it's terminated in
<d1b2> <you_snus_you_lose> once you get those fixed i bet you you can switch to ordinary cheapo 0402 resistors and not notice the difference
<azonenberg> well the resistor is a high impedance load. so if there's a mismatch further down the line (sma launch or scope)
<azonenberg> you will get reflections bouncing back and forth
<d1b2> <you_snus_you_lose> ideally both ends of the tline should be terminated
<d1b2> <you_snus_you_lose> the probe tip should feed into an attenuator-like structure
<d1b2> <you_snus_you_lose> that has high impedance on one side and 50 ohms on the other side
<azonenberg> Yes, i've seen some probe designs that add a 50 ohm terminator after the attenuator
<azonenberg> but that doubles your probe attenuation
<azonenberg> if i can match well enough i won't need it
<azonenberg> as far as witching to ordinary resistors, not likely
<azonenberg> even the flip chip 200 ohm resistor drops to 166 at 5 GHz
<azonenberg> a wraparound one is way worse
<d1b2> <you_snus_you_lose> that's... unusual
<azonenberg> Have you actually put a large valued resistor on a VNA?
<azonenberg> this is characterization data from Modelithics published by Vishay
<azonenberg> on a quartz substrate
<d1b2> <you_snus_you_lose> i've measured ordinary 0603 220 ohm resistors soldered to a sma connector and they stay very close up to 3GHz
<d1b2> <you_snus_you_lose> like 210-230 ohms
<d1b2> <you_snus_you_lose> the thing is
<d1b2> <you_snus_you_lose> it doesn't really make sense to talk about the impedance "of the resistor"
<azonenberg> The FC0402 500 ohm is 174 ohms in flip chip and 116 with wraparound terminals at 5 GHz
<d1b2> <you_snus_you_lose> because impedance depends on how the resistor is mounted and how you connect to it
<d1b2> <you_snus_you_lose> well
<d1b2> <you_snus_you_lose> that's a layout artifact
<d1b2> <you_snus_you_lose> solder 0603 resistors directly to an sma connector like here:
<azonenberg> no. That's the de-embedded properties of the resistor itself
<azonenberg> because of parasitic C between the end caps
<azonenberg> My actual design is based on field solver simulation of the PCB layout with the Vishay S-parameter models added to the resistor footprints
<azonenberg> I just kicked off another sim with some updates based on the board house wanting to change to a slightly different polyimide
<d1b2> <you_snus_you_lose> let me find that image
<d1b2> <you_snus_you_lose> i simply soldered 2 x 220 ohm resistors onto an sma connector like the rightmost picture
<d1b2> <you_snus_you_lose> measure it on a vna
<d1b2> <you_snus_you_lose> it's spot on all the way to 4GHz
<d1b2> <you_snus_you_lose> i can do a quick measurement again right now
<azonenberg> see page 3
<azonenberg> They also publish full s-parameter data, not just the lumped models you see here
<azonenberg> 26.2 vs 39.2 fF shunt capacitance
<azonenberg> for flip chip vs wraparound
<d1b2> <you_snus_you_lose> and where is the physical layout?
<azonenberg> For my design?
<azonenberg> or their test board
<d1b2> <you_snus_you_lose> their test board
<d1b2> <you_snus_you_lose> it only says "mounted to quartz test boards"
<d1b2> <you_snus_you_lose> that could mean soldered to a quartz substrate pcb
<azonenberg> Yeah they presumably de-embedded board effects since it says "at the bonding pad-resistor reference plane"
<d1b2> <you_snus_you_lose> in which case the stray capacitance is created by the pads on the pcb
<azonenberg> Modelithics knows what they're doing, i trust their measurements
<d1b2> <you_snus_you_lose> well
<d1b2> <you_snus_you_lose> you can't de-embed the mounting
<azonenberg> sure you can. you have to know how thick the solder layer is but you can measure that
<d1b2> <you_snus_you_lose> hold on let me find my test resistors
<azonenberg> I actually started trying to do a from-first-principles simulation of these resistors a while ago and ran into problems because my Sonnet license didnt allow enough layers in the simulation
<azonenberg> i actually sanded off the insulating coating
<azonenberg> measured the resistive element to +/- a few μm
<azonenberg> calculated the sheet resistance based on the shape and the known terminal to terminal resistance
<azonenberg> measured the dimensions of the terminals and the Al2O3 substrate
<d1b2> <you_snus_you_lose> ok this is 2 470ohm resistors in parallel but you get the idea
<azonenberg> Interesting
<d1b2> <you_snus_you_lose> this software won't plot a |Z| graph properly but i can see from dragging the marker that it's 230-240ohms throughout the band
<d1b2> <you_snus_you_lose> and the smith chart focuses to a dot
<d1b2> <you_snus_you_lose> from 100 to 4400 MHz
<d1b2> <you_snus_you_lose> physically it's the same thing as the rightmost one in this picture: https://hforsten.com/img/vna/xcal_kit.jpg.pagespeed.ic.iGbbUOJsIC.jpg
<agg> what did you use to calibrate the vna?
<d1b2> <you_snus_you_lose> the same kind of cal kit shown in the above picture
<agg> I wonder if you're calibrating out precisely the effect you're trying to measure :p
<d1b2> <you_snus_you_lose> well it's a matter of reference plane
<d1b2> <you_snus_you_lose> oh right i did set a 7ps port extension (around 1.2mm)
<d1b2> <you_snus_you_lose> which is equal to the length of the body of the resistors
<d1b2> <you_snus_you_lose> so if you imagine the resistor itself as an ideal resistor plus a 1.2mm transmission line...
<d1b2> <you_snus_you_lose> it's almost a perfect model
<d1b2> <you_snus_you_lose> because removing that 1.2mm gets me to an almost perfect dot on the smith chart
<d1b2> <you_snus_you_lose> let me try with a better cal kit (35dB return loss to 6GHz)
<d1b2> <you_snus_you_lose> but then i have to play with de-embedding because the cal kit is male instead of female
<azonenberg> I calibrated my VNA with a Pico SOLT kit that came with NIST-traceable cal data
<azonenberg> So i believe my measurements a bit more :p
<azonenberg> and obviously i trust field solver modeling and modelithics data more than a homegrown cal kit
<d1b2> <you_snus_you_lose> with the specified 35dB return loss cal kit i'm getting impedance from 218 ohms to 230 ohms
<d1b2> <you_snus_you_lose> still looks like a dot on the smith chart
<d1b2> <you_snus_you_lose> i don't think it can be a coincidence that it so easily focuses to a dot on the smith chart
<d1b2> <you_snus_you_lose> and i wouldn't trust those simulations too much
<d1b2> <you_snus_you_lose> they are based on measured data too and depend entirely on assumptions made in the test setup
<d1b2> <you_snus_you_lose> i've always said ordinary smd resistors are close to ideal up to 3-4GHz and my designs prove it
<d1b2> <you_snus_you_lose> (well, ideal if you take into account transmission line effects)
<d1b2> <you_snus_you_lose> of course a 220 ohm resistor can't be treated as a pure 220 ohms in circuit
<d1b2> <you_snus_you_lose> you have to model it as two sections of transmission line with a 220ohm resistor in between, and this transmission line's characteristics is entirely a function of your layout
<d1b2> <you_snus_you_lose> it isn't the resistor you should be concerned with, but rather the layout
<d1b2> <you_snus_you_lose> without port extension, you can see that the "resistance" (real part of impedance) indeed drops to very low values at 3GHz
<d1b2> <you_snus_you_lose> but i think this way of looking at only the real part of a series equivalent is meaningless
<d1b2> <you_snus_you_lose> can you see the s1p file i sent from the irc side?
<azonenberg> I see it but one port doesnt tell me much
<azonenberg> i care about s21
<d1b2> <you_snus_you_lose> there's no s21 of a resistor
<d1b2> <you_snus_you_lose> it's a one port device
<d1b2> <you_snus_you_lose> measuring it with two ports implies a test setup that has a ground and mounting
<d1b2> <you_snus_you_lose> and that's inevitably going to be different in your actual design
<azonenberg> It's a series resistor, not a shunt
<azonenberg> It's a two port device
<azonenberg> yes, there's a reference plane
<d1b2> <you_snus_you_lose> sigh...
<azonenberg> Like i said, these idiosyncrasies are why i wanted to model the resistor from first principles
<azonenberg> maxwell's equations on the actual component geometry
<azonenberg> When i get sonnet pro, i'll probably go back and do that
<d1b2> <you_snus_you_lose> ok yeah, if the test data is measured in a way that's similar to the final design, then the model is usable for simulating the design
<d1b2> <you_snus_you_lose> i do think you should try doing some designs without using a fancy simulator
<d1b2> <you_snus_you_lose> because you get to learn how physical things really behave by poking at physical things and testing hypothesizes
<d1b2> <you_snus_you_lose> then you'll be able to know exactly where you can skimp on parts and where you must use the brand name stuff
<azonenberg> I moved to the nice resistors *because* i had problems with frequency response of the cheap stuff
<d1b2> <you_snus_you_lose> or just add a small ground cutout under the pads which changes the response in the same way
<d1b2> <you_snus_you_lose> LOL
<azonenberg> I already have ground cutouts under the resistors
<d1b2> <you_snus_you_lose> i did some experiments tuning a SMA connector to stripline transition and discovered a lot of those tricks, in the end i easily got to 30dB return loss up to 3GHz
<d1b2> <you_snus_you_lose> not an edge launch sma connector, a "through hole" sma connector
<d1b2> <you_snus_you_lose> which is much harder to tune
<d1b2> <you_snus_you_lose> and all this was on ordinary FR4
<d1b2> <you_snus_you_lose> you can argue that my cal kit isn't good enough and the tuning is wrong, but if i can get a better cal kit i can repeat the process and tune to 30dB w.r.t the good cal kit
<azonenberg> my point is that matching wrt a grounded resistor doesn't translate well to S21 flatness of a series resistor
<d1b2> <you_snus_you_lose> sigh...
<d1b2> <you_snus_you_lose> there isn't really a "S21 flatness" of a resistor
<d1b2> <you_snus_you_lose> give me a shite resistor and i can design a pcb layout that gives a flat response with that resistor in series
<d1b2> <you_snus_you_lose> anyway i'm just too accustomed to low cost design and think about this way of doing things when approaching any problem
<d1b2> <you_snus_you_lose> "expensive parts are never the solution" is my mindset lol
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<miek> um
<_whitenotifier> [scopehal-apps] azonenberg pushed 2 commits to master [+2/-0/±2] https://git.io/JLA4q
<_whitenotifier> [scopehal-apps] azonenberg 15707e1 - ChannelPropertiesDialog: fixed missing initializer for m_hasAttenuation on digital channels
<_whitenotifier> [scopehal-apps] azonenberg b610b22 - Preliminary eye masks for Kintex-7 input buffers
<_whitenotifier> [scopehal] azonenberg opened issue #393: SPI flash protocol decode doesn't understand "read SFDP" instruction 0x5a - https://git.io/JLABK
<_whitenotifier> [scopehal] azonenberg assigned issue #393: SPI flash protocol decode doesn't understand "read SFDP" instruction 0x5a - https://git.io/JLABK
<_whitenotifier> [scopehal] azonenberg labeled issue #393: SPI flash protocol decode doesn't understand "read SFDP" instruction 0x5a - https://git.io/JLABK
<_whitenotifier> [scopehal] azonenberg pushed 1 commit to master [+0/-0/±2] https://git.io/JLAge
<_whitenotifier> [scopehal] azonenberg 2c622ed - Added support for 0x5a "read SFDP" instruction to SPIFlashDecoder. Fixes #393.
<_whitenotifier> [scopehal] azonenberg closed issue #393: SPI flash protocol decode doesn't understand "read SFDP" instruction 0x5a - https://git.io/JLABK
<_whitenotifier> [scopehal] azonenberg pushed 1 commit to master [+0/-0/±1] https://git.io/JLA21
<_whitenotifier> [scopehal] azonenberg 782a971 - SPIFlashDecoder: correctly handle 0x9f instruction dummy byte for Winbond W25N, but immediate reply for standard flash
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