17:31 <hackerfoo> litghost: The `tile` argument to prjxray_tile_import.py seems to filter which sites are imported. Does the script support importing sites from multiple tiles to make a single tile?

17:32 <litghost> hackerfoo: That is not a feature that has been required in the past, we'll need to add it. In addition, the router import will not understand how to do that, but the underlying data schema should support it.

17:33 <litghost> hackerfoo: I recommend you start the import by pretending to just be the IOI tile

17:33 <hackerfoo> Okay, I can add it. I just wanted to make sure I wasn't overlooking anything.

17:34 <litghost> as the IOI tile has the vast majority of the interconnect facing ports

17:34 <litghost> I believe there are a low number of wires on the IOB tile that face the interconnect

17:39 <hackerfoo> Looks like the IOB just has a couple disable wires.

17:42 <litghost> Ya, exactly

17:43 <litghost> We can probably safely ignore those for the first iteration

17:43 <litghost> In the long term, we'll want to add support for tying those wires to the interconnect

17:44 <litghost> What you may find is that by default those disable lines are tied to VCC

17:44 <litghost> E.g. disable the buffer, save power

17:44 <litghost> So in order to make things work, we may need to tie them to GND

17:47 <hackerfoo> It's probably best to modify the script to support merging tiles. I'll probably also need to split the upper and lower halves, so that I don't get two of each site.

17:54 <litghost> true

17:54 <litghost> splitting is already supported

17:54 <litghost> merging has not been done

20:35 <sf-slack2> <butta> We updated to the newest symbiflow-arch-defs and are using the VPR built from source from the current master+wip branch on the SymbiFlow fork. We have noticed that this version of VPR is different from the version that conda pulls, and when running this version of VPR on our tests we get the following error:

20:35 <sf-slack2> <butta> Error 1: Type: Routing File: /scratch/safe/SymbiFlow/vtr-verilog-to-routing/vpr/src/route/check_rr_graph.cpp Line: 509 Message: in check_unbuffered_edges: connection from node 587750 to node 1382947 uses an unbuffered switch (switch type 8 'pass_transistor_R0.0_C0.0_Tdel0.0') but there is no corresponding unbuffered switch edge in the other direction.

20:43 <sf-slack2> <butta> That was running with our modified architecture file to work with PR regions, we now switched to architecture and rr_graph files produced from a completely fresh version of symbiflow-arch-defs (still with source built vpr) and get this error:

20:44 <sf-slack2> <butta> Error 1: Type: Packing File: /scratch/safe/SymbiFlow/vtr-verilog-to-routing/vpr/src/pack/output_clustering.cpp Line: 219 Message: Differing modes for block. Got LUTs previously and DRAMs for edge 3 (interconnect BO6).

20:44 <sf-slack2> <butta> When we switch to using the conda VPR this issue no longer occurs

20:47 <litghost> butta: The version that is pulled from conda is built at a specific version and is the "current" version we support

20:48 <litghost> butta: master+wip is roughly the "next candidate", and PR's like https://github.com/SymbiFlow/symbiflow-arch-defs/pull/858 update

20:48 <tpb> Title: cmake: update VTR and add new command line options by acomodi · Pull Request #858 · SymbiFlow/symbiflow-arch-defs · GitHub (at github.com)

20:51 <sf-slack2> <butta> @litghost Okay, using the conda version of vpr with our architecture files seems to work

20:53 <sf-slack2> <butta> That prevents us from using the binary r/w in VPR for now but I will work on cleaning up that PR soon so hopefully it can be included in the next conda version of VPR

21:41 <sf-slack2> <acomodi> @butta FYI, with the current master+wip there is a patch (suppress-errors-and-warnings) that enables to disable VPR_THROWs from a command line option

21:42 <sf-slack2> <acomodi> e.g. `--disable_errors check_unbuffered_edges` will solve the error you mentioned

21:44 <sf-slack2> <acomodi> More information on how to use it here: https://github.com/verilog-to-routing/vtr-verilog-to-routing/pull/672

21:44 <tpb> Title: vpr: added optional disable errors and suppress warnings by acomodi · Pull Request #672 · verilog-to-routing/vtr-verilog-to-routing · GitHub (at github.com)