clifford changed the topic of #yosys to: Yosys Open SYnthesis Suite: http://www.clifford.at/yosys/ -- Channel Logs: https://irclog.whitequark.org/yosys
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<pepijndevos_> ZirconiumX, going over Farnell to find parts (when will I ever learn to do this before ordering PCBs) it seems like HC is definitely the more most available family as far as I can tell.
<pepijndevos_> Also... DIP is on the way out, surprise, surprise
<pepijndevos_> Except for the XOR gate, which they *only* had in AC in DIP. Lots of SOIC adn TSSOP
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<pepijndevos_> The adder is also... available until they run out of stock. Should have done this stuff a few decades ago...
<tnt> pepijndevos_: any reason you didn't go for soic ?
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<ZirconiumX> pepijndevos_: for stuff running fast you should generally pick SOIC. It's smaller, so your chips can be denser and have shorter connections between them
<corecode> hm, -l doesn't write a log file
<corecode> did i catch a bad version in between?
<corecode> heh i just ran into a bug - i had an empty module, and yosys included it in the json as blackbox module, instead of as empty
<corecode> so nextpnr was like "top - i don't know what type of module that is"
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<ZipCPU> Did you give -l the name of the file to write?
<corecode> yes
<corecode> but i also passed -E
<corecode> hm, -E leaks error messages into the deps file
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<ZirconiumX> equiv_opt is confusing me a bit
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<pepijndevos_> tnt, This thing is going to run a khz speeds so in this case I prefer to use sockets and have easy options for beun fixes. If stuff works, my CPU will deffinitely have SOIC.
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<corecode> pepijndevos_: what are you working on? synthesis of cpu into 74 series logic?
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<pepijndevos_> corecode, exactly
<tpb> Title: GitHub - ZirconiumX/74xx-liberty (at github.com)
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