<q3k> that's one thing horizoneda does well
<q3k> a symbol's pin (like GND) can have multiple package pins tied to it
<q3k> no more million GND pins
<whitequark> even eagle does that
<q3k> but kicad doesn't, right?
<gruetzkopf> the kicad hack is to stack them all :D
<q3k> gruetzkopf: eww
<whitequark> kicad doesn't and that's dumb
<gruetzkopf> yeah, it's dumb, but you can hide that from the end user
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<TD-Linux> snapeda's parts have them stacked in kicad
<TD-Linux> if there was a special rendering path for displaying the pin number when multiple are stacked that would be acceptable I think
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<mithro> Oh wait it uses Synopsys Design Compiler -- bah
<emeb_mac> lol Design Compiler
<emeb_mac> I remember when I used to use that. 20 yrs ago.
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<tnt> In d4b3c1d819703667b604ad144a36415c2f3bcdf5 the TMG_IGNORE seems wrong ...
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<mithro> Has anyone looked at the "warmboot / coldboot applet" for the ice40?
<mithro> tinyfpga: ^
<mithro> Ahh ha - icemulti is what I want to look at
<tnt> mithro: yes it is :p
<mithro> tnt: So, it looks like the image start address can be pretty much any 3 byte number?
<tnt> daveshah: do you have any idea what the SPI_ENABLE_{0,3} bits are for ?
<daveshah> I think they route the hard SPI IO to fabric rather than dedicated pins
<daveshah> Icecube always sets them to use fabric
<daveshah> I don't think the dedicated pin option can ever be used in icecube (and is quite possibly borked)
<tnt> Oh, ok, interesting. Would explain why I2C has 2 enables.
<tnt> mithro: so it would seem, but I never actually tested.
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<tnt> Completely untested support for SB_I2C and SB_SPI on the UP5k
<emeb> tnt: oh nice - I'll give it a shot.
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<emeb> tnt: built OK. Tried it on a design with SB_SPI and got this -> ERROR: no timing info for port 'SPIWKUP' of cell type 'SB_SPI'
<emeb> that was an unconnected net, so I deleted it but then it just complains about other outputs that I *am* using.
<emeb> ERROR: no timing info for port 'SOE' of cell type 'SB_SPI'
<tnt> emeb: mmm, in ice40/arch.cc for the id_SB_I2C and id_SB_SPI case, replace TMG_ENDPOINT with TMG_IGNORE
<tnt> definitely not "correct" but the timing files from icestorm don't see to have the timing info for SB_I2C and SB_SPI :/
<emeb> ok - trying
<tnt> daveshah: any idea about that ?
<daveshah> No, I don't think I ever cared enough to add them
<daveshah> You could add them to icefuzz and rerun if you wanted the real data
<emeb> tnt: I'm not seeing the strings "id_SB_I2C" or "id_SB_SPI" in ice40/arch.cc
<daveshah> Or just inspect an sdf file from icecube
<emeb> did I check out a wrong branch?
<emeb> yeah - didn't do the i2c_spi branch. just a sec...
<emeb> weird that it didn't give the earlier unsupported error...
<emeb> tnt: git n00b here - when I do git pull origin i2c_spi I get a bunch of conflict warnings. what am I doing wrong?
<tnt> git checkout -b xxx i2c_spi
<tnt> git checkout -b xxx origin/i2c_spi
<emeb> thx
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<emeb> \o/ - built OK
<emeb> and nextpnr is happy w/ the design.
<emeb> now need to try in hardware...
<emeb> bitstream works - loads up & CPU runs. need to do some tests to see if I can access the SPI core...
<emeb> that's not working like it should, but could well be me 6502<->wishbone logic.
<emeb> so need to study more
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