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<mithro> whitequark: Have you looked at https://github.com/cornell-brg/pydgin at all?
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<whitequark> mithro: never heard of it before
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<tnt> daveshah: there is no way to enable/disable HFOSC trimming 'on the fly' right ?
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<daveshah> tnt: I don't think so
<daveshah> There might be a way of reading the factory trim values over SPI, but I'm not sure what that would be
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<tnt> daveshah: Mmm, yeah, that'd be interesting.
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<CounterPillow> Which FPGA is right for me if I'm into Winnie the Pooh Unbirthing fanfics?
<tnt> Virtex 2 pro
<CounterPillow> Thanks.
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<nats`> oO
<nats`> the worst target ever :D
<nats`> (or equally worse as Virtex 4 pro) :p
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<mwk> nats`: what's so horrible about it?
<nats`> a lot of bug in the hardware IP is the first things in my mind
<nats`> starting the PPC cores is......
<nats`> awful
<mwk> go on please
<nats`> (part because of the arch but also because EDK was an awful tool)
<mwk> now I'm wondering how that thing works
<nats`> which one ?
<mwk> the PPC core
<mwk> starting it
<nats`> maybe you can find some old doc about it
* mwk has a ppcful virtex 5 board, would like to get it working some day
<nats`> I'm not sure what is your goal
<mwk> just messing around
<nats`> that's ok :)
<nats`> have fun :D
<mwk> but um
<azonenberg> Sell it on ebay to some sucker who doesnt know what it is
<azonenberg> then buy a zynq :p
<mwk> I've looked at the example that came with the board
<nats`> azonenberg, I didn't want to say that
<azonenberg> lol
<nats`> but yeah....
<mwk> that thing uploads a bitstream via JTAG
<nats`> anything pre 7 serie is really a bad idea to work on
<nats`> (maybe S6 can still have some use)
<azonenberg> s6 wasn't that bad for its time, but i consider it de facto NRND now
<mwk> and then issues some weird undocumented PPC-specific JTAG commands to boot the CPU, I think
<mwk> like, a lot of them
<azonenberg> 7 series is also the only xilinx family likely to get a f/oss toolchain in the foreseeable future
<mwk> azonenberg: untrue
<azonenberg> mwk: oh?
<mwk> I'm specifically working on S6 support
<azonenberg> hey, if you're into that i wont stop you
<nats`> anyway I really advice to not go down the Virtex 6 and older road
<nats`> ...
<nats`> those fpga are power hungry for nothing
<nats`> I still have fun with some old project using S3 but they could be replaced by Lattice ICE today
<azonenberg> yeah
<azonenberg> the smallest few s6's actually have a small edge over the equivalent 7 series in static power
<azonenberg> although dynamic power is often worse
<nats`> I wonder if someone works on MAX10 support
<nats`> I had a great experience recently it's a cool arch
<kc8apf> Every PPC core I've used has some bootstrapping done via poking things over JTAG
<kc8apf> Even PowerMac G5s had a PIC on the processor card to do that
<kc8apf> I've only heard about work on the Vs: MAX V, Cyclone V
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