07:00 <Sprite_tm> tnt: Hey I seem to remember (and a quick Google also supports it) that you had an USB stack going on?

07:00 <tnt> Sprite_tm: I do

07:02 <Sprite_tm> Is it available for steali... borrowing for my project? I need something to connect to a RiscV as a generic USB1.1 core :)

07:02 <tnt> It's there : https://github.com/smunaut/ice40-playground/tree/master/cores/usb

07:03 <tnt> Oh wait actually you probably want to use the 'usb' branch of that repo.

07:04 <Sprite_tm> Cool, thanks. Lemme read the arch doc first, the microcode thing is new to me...

07:10 <Sprite_tm> Hm, that looks sane, although a bit unconventional... Say I were to plan on throwing this into an ECP5 next to a riscv core and port tinyusb (https://github.com/hathach/tinyusb) to it, anything else I'd need to know?

07:13 <tnt> (1) there is a few instanciated ice40 primitives. Basically the 2 IOs buffers and a few RAMs / ROMs. The RAM / ROM can probably be replaced by inferrence, but one being a bit special (DP with different width), yosys wasn't inferring it optimally which might not matter on a ECP5, but on an iCE40 the extra cost was a bit much so I went with instanciation.

07:15 <tnt> (2) I've not really used the tinyusb stack, so not sure how it would map really. I do have https://github.com/smunaut/ice40-playground/tree/usb/projects/riscv_usb which connects that core to a riscv and has its own usb stack which currently does USB DFU and a hackish CDC ACM.

07:18 <tnt> But really it shouldn't be too hard, I don't think it's "that" special except for what's described in "Special handling for Control Endpoints". (which you can actually ignore if you want to, it just made it easier for me to implement them in a spec compliant way, ...).

07:18 <Sprite_tm> Check. According to the tinyusb guys, their HAL is written in a pretty abstract way so it should map onto most USB hardwares. I think it's a nice way to get a whole bunch of dev drivers 'for free', hence the idea to use that.

07:18 <Sprite_tm> Yeah, I saw that, that actually looks like a nice feature.

07:19 <tnt> Yup I'd definitely be interested to see tinyusb working with my core for sure :)

07:20 <Sprite_tm> Tbh, your USB thing is a lot more sane than some unnamed USB IP from a company that rymes with 'blynopsis', so it shouldn't be too hard to port :P

07:22 <tnt> I actually had never worked with USB on microcontrollers before writing that core so I didn't have really much idea of how this worked in other devs.

07:23 <Sprite_tm> It's... errm... let's say that it probably helps you could create this from scratch and didn't have to have a bunch of different modes in which various users use it to make things extremely complicated. I'm halfway sure some commercial IP is plagued by that.

07:24 <tnt> Hehe, yeah probably.

07:30 <Sprite_tm> Check, copy-pasted to my project, I'll probably see if I can get it to work this weekend. Will keep you updated.

07:31 <tnt> Sprite_tm: you used the version in the 'usb' branch right ? (it has a couple of fixes not yet in master ...)

07:32 <Sprite_tm> Yep.

10:20 <tnt> Sprite_tm: https://pastebin.com/EznBiQ5P

10:21 <tnt> Sprite_tm: this replaces all the instanciated RAM with inferred versions. (tested on ice40 hw)

10:22 <tnt> The hw inferred for the ecp5 is sort of wasteful for the usb_ep_buf.v ... but I have no idea how to write a variable port size ram with different clock in a way that yosys maps it optimally for the ecp5.

10:25 <tnt> Pretty sure if you want to do it well you have to instanciate PDPW16KD yourself.

10:27 <Sprite_tm> tnt: Thanks! If any, it's enough to get started with; I'll optimize later when I run out of BRAM :P

21:18 <tnt> Somehow I feel some of the HFTRIM bits aren't wired right.

21:18 <tnt> https://i.imgur.com/0M9nfuj.png

21:22 <daveshah> tnt: radiant exposes the trimming officially iirc, so that would be a way of checking officially

21:23 <tnt> hugh radiant ... don't think I even got it to run once.

21:24 <tnt> I'll see if I can work it out from the collected data I have. If not, I'll fallback to radiant :p

21:24 <tnt> I'm scanning another fpga now to get data from multiple chips.

21:28 <tnt> https://i.imgur.com/N4LRkvK.png

21:29 <cr1901_modern> daveshah: When you get the chance, did you see my privmsg? I have some good news