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<tnt> daveshah: mmm, in a timing report (UP5K) I see "Info: 1.2 4.3 Setup z_SB_LUT4_I2_LC.I2" so 1.2 ns setup for I2 input. But looking at timings-up5k.txt I see "SETUP posedge:in2 posedge:clk 363.839:636.141:980.096".
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<tnt> MMmm, the IOPATH number for up5k lut looks weird to me. I3 is _very_ much faster than the rest ... like by 0.4 ns. While the variation between I0 and I2 is only 0.08 ns. OTOH the 'SETUP' timing numbers are progressing way more smoothly from I3 to I0.
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<kc8apf> daveshah: have you found any pattern to Lattice's JTAG IDCODEs? They don't seem to have an official docs explaining their device-specific field.
<daveshah> Haven't really looked for one tbh
<daveshah> For the ECP5, iirc, there are two bits for density and two bits for u/um/um5g
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<cr1901_modern> Check under /usr/local/diamond/3.10_x64/cae_library/ibis/ I think?
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<awygle> awesome
<awygle> can i send this to my boss
<qu1j0t3> that;s magnificent
<qu1j0t3> b 46
<levi> A thing of beauty indeed.
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<gruetzkopf> Of course you can
<gruetzkopf> Going to do this properly
<gruetzkopf> Adapter+card should fit in a normal full-height pcie slot
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<feuerrot> gruetzkopf: the card itself is already smol slot sized?
<gruetzkopf> Somewhere in between half and full height
<feuerrot> aw
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