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<OmniMancer1> Would it be okay to try and make a Ghidra processor definition for boneless as a learning exercise?
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<ZirconiumX> OmniMancer1: Why not?
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<OmniMancer1> are there any available binary boneless programs?
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<ZirconiumX> tpw_rules probably has some
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<tpw_rules> none of them really exist in binary form OmniMancer1. they get assembled as the program is compiled or downloaded
<tpw_rules> but i could write some out to binary for you if it would be helpful
<tpw_rules> s/compiled/synthesized i guess/
<OmniMancer1> One thing I do wonder is how well Ghidra will deal with the word based memory
<OmniMancer1> yea a raw dump of the program code would be helpful, perhaps of the serial bootloader thing you have?
<OmniMancer1> The windowed memory mapped registers will be interesting too
<tpw_rules> can i just give you the data as a list of numbers?
<OmniMancer1> a raw binary file would likely be best
<tpw_rules> ok, but that will be somewhat more annoying to transport
<OmniMancer1> a list of numbers or base64 encoding is sufficient
<whitequark> also boneless doesn't have an official endianness
<tpw_rules> i treat all the interfaces as little endian because intel has hurt me. but yeah on the fpga there's really no concept
<OmniMancer1> ihex is likely also helpful if it isn't a full address space image
<OmniMancer1> but ihex is also kind of tied to 8bit bytes
<OmniMancer1> indeed, being a word based arch it doesn't really have an endianness
<tpw_rules> http://dpaste.com/02P7NDZ a compromise
<tpw_rules> it only use one register window (0xFFE8) though. and the ABI is kind of meaningless
<OmniMancer1> Indeed, but disassembly can occur
<tpw_rules> i'm not sure how you would instruct it to follow returns though
<OmniMancer1> how do returns work in boneless?
<OmniMancer1> link registers?
<tpw_rules> link register, yeah
<OmniMancer1> that should be fine
<tpw_rules> but the link register is whatever is convenient for me :D
<tpw_rules> oh also, there's currently a bug in the assembler where even though the manual says it's verboten for imm[3:] to be nonzero for EXTI instructions, the assembler puts those bits of the immediate there anyway
<OmniMancer1> so it's a generic JR?
<tpw_rules> yeah. JAL(reg, target) then JR(reg, offset_from_reg_value)
<OmniMancer1> I guess it might be able to follow that from dataflow but unsure
<OmniMancer1> getting instruction formats need to exist first :P
<OmniMancer1> does anything happen at start of a function in general?
<OmniMancer1> or subroutine
<tpw_rules> uuuusually i'm nice about it and use R7. i have this strange compulsion to choose completely unsuitable technology then throw all abstraction and common sense out the window in order to make it do what i need
<tpw_rules> let me pull up some less bonkers code. i've kind of made an ABI
<tpw_rules> so that's my abi for a routine which accepts parameters and returns stuff
<OmniMancer1> so the actual registers that exist in the arch are PC, W, ext13 and the status flags?
<OmniMancer1> tpw_rules: I meant more things like adjusting the window is definitely a potential function pattern?
<tpw_rules> i would say yes?
<tpw_rules> also i'm not sure if ext13 would be considered to exist
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<sorear> it's like the thumb-1 branch situation
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<OmniMancer1> oh and the has ext13 flag of course
<OmniMancer1> I guess exti works vaguely like a prefix
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<whitequark> exti is precisely a prefix
<whitequark> intended as such
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<OmniMancer> wq: I guess boneless doesn't have any exception or trap stuff but the way the manual describes it it's a prefix that is allowed on pretty much anything but will only affect some instructions
<whitequark> OmniMancer: that's correct yes
<whitequark> it's a bit like rep in x86
<whitequark> well
<whitequark> unless i misremember how that works
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<OmniMancer> should it be considered wrong for it to appear in places it does not have any effect?
<tpw_rules> no, it just doesn't do anything
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