ChanServ changed the topic of #lima to: Development channel for open source lima driver for ARM Mali4** GPUs - Kernel has landed in mainline, userspace driver is part of mesa - Logs at https://people.freedesktop.org/~cbrill/dri-log/index.php?channel=lima and https://freenode.irclog.whitequark.org/lima - Contact ARM for binary driver support!
<anarsoul> rellla: btw, feel free to poke it if you want, I'm currently hacking on PBP (some u-boot and ATF hacking)
<anarsoul> it shouldn't be too difficult
<anarsoul> basically the issue is that we currently align mipmap levels at 16pixel for both width and height
<anarsoul> but hardware doesn't support stride for any levels but level 0
<anarsoul> as result we can't sample higher mipmap levels correctly
<anarsoul> we need to create a shadow buffer for linear textures if they have > 1 levels
<anarsoul> render into it and do a copy (via u_blitter?) into actual resource
<anarsoul> IIRC vc4 does something similar
<MoeIcenowy> anarsoul: OT here, but ATF master fails to work on RK3399
<MoeIcenowy> you need to check out some old commit
<anarsoul> ?
<anarsoul> wrong channel? :)
<anarsoul> MoeIcenowy: ATF master works fine for me on RK3399
<MoeIcenowy> anarsoul: I said "OT here"
<anarsoul> just CONFIG_ROCKCHIP_SPL_RESERVE_IRAM to 0
<anarsoul> *just set
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<martm193> I see some patterns in large hunks of the work being done in supermatrix libs mentioned, however i have adjusted this to GLSL or ARB, i can not really come up with explanations that are so big rules!
<martm193> even the alus can execute multiple times still, but they can do it once the chip has gotten into stall in the shader.
<martm193> The thing i was mentioning about texture arbiter, imagine that interconnect like pci-e or so called memory bridge would not buffer the loads from it's transactions based of the texture arbiter
<martm193> then for instance once the load did stall for any of the reason, it would permanently block in in the scoreboard until unstalled manually by WAR procedure
<martm193> but with the texture load arbitration or load buffering, and reentering the fifos, it would try to bring them out if something changed
<martm193> yeah the chip itself would manage this, and that is quite some more convenient way in the end
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<martm193> I am testiing in the hw as soon as i get my laptop back! AFAIK according to simulator and any of the patents it should work somehow.
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<martm193> yeah well the way i see, it has to work, without the need to bully here neither from me towards you nor from you to me.
<martm193> when you think logically, this that it would work can be derived cause of the presence of the supermatrix papers allready, this is only a minor change from their CUDA to GLSL!
<martm193> As far as i know, the method to repeat texture unit data is scientifically proven on all GPUs tested, in the litmus testsuite.
<martm193> that has happened or brought to an attention in 2015. by manchester university people.
<martm193> both litmus and TCE tta docs, both from 2015. instruction guards thesis by a fin in 2015 demonstrates the same thing.
<martm193> I am not gonna make my own computing equipment based of MIAOW, cause the TTA kit does all the same better.
<martm193> the plan is to survive for some time yet more, and the code is not entirely hard to be published doing the perf path, i can easily meet the deadline i set up for the new year 2020.
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<martm193> TTA code is better, it needs some graphics pplumbing which is fairly big work for a year or so, but they have opencl bits allready done, command buses via almaif interface and whatever, they only have no jtag boundary scan though
<martm193> and graphics pipeline stages, everything else is in place
<martm193> maybe the kazan or something via opengl->vulkan translation should do that, but...
<martm193> the mission is doable with minor set of llvm IR overlaying
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<anarsoul> or ready for review?
<enunes> anarsoul: I guess it's not ready for detailed/code review since it's not extensively tested, but I welcome input on design so I can actually try all those primitives and see if I'm not missing some off-by-one thing
<anarsoul> well, looks good to me in general
<anarsoul> if it doesn't regress deqp and/or piglit guess we can merge it once someone from gallium reviews gallium part
<anarsoul> oh, btw
<anarsoul> enunes: what's revision of your rockpro64?
<anarsoul> is it 2.1 or 2.0?
<anarsoul> and can you run 'i2cdetect 1' on it?
<enunes> anarsoul: not sure, I'm not next to it now but I can check later
<enunes> I'm running the -ARCH kernel I think, not the vendor one
<anarsoul> tell me output of 'i2cdetect 1' and I'll guess your revision :)
<enunes> it will not brick right? if it does, that also kicks me off from IRC :)
<enunes> once I tried sensors-detect and it crashed badly
<anarsoul> nah, there's only audiocodec on this bus
<enunes> on 0x11 I have 11
<anarsoul> so your revision is 2.1
<anarsoul> (likely)
<anarsoul> please confirm it when you have some time
<anarsoul> *sigh*
<anarsoul> guess we need another dts for 2.0
<enunes> I'll be next to it in about half an hour
<anarsoul> or I can ask TL for instructions on how to move r225 to r226 (or was it vice versa?)
<enunes> anarsoul: so yeah, board is V2.1 2018-07-02
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<martm193> I do not like googling that crap, once again that kazan/swiftshader and anything out-there like metal to llvm IR, that just is not sane what they ramble on.
<martm193> so my pick is not to deal with ksim/kazan nor swiftshader, however TCE/TTA processor kit can do anything more intelligently and in a quick way
<martm193> you just have buses or ports for instruction data, upto 1024 is allowed for the core arbiter, you size it properly
<martm193> and send into the queues a stream you like
<martm193> Most of those large hunks of code only trash the world, they make no sense.
<martm193> transferring commands from fallback memory is entire bullshit, be that fixed or programmable pipeline stage.
<martm193> I allready gave my resignation i am afraid, I do not know how to use VIM/EMACS that way to remove all the crap you have written.
<martm193> MEN FUCK YOU HONESTLY! And all those retarded humorists on youtube who have problem on serious manners, chick 16years old is lot smarter then you, greta. I was also smarter in that age than you are now.
<martm193> I do not know what you are up to , coming here i knock you down, I am not sure wtf. who is the robot or brain, that processes all this shit from what you have packed to hdds world wide.
<martm193> It appears i can not do it, i am not sure what is the strategy to flood retarded code in deciphered blobs to the storage wasting room on purpose
<martm193> aside from your humorism and obsession, what is the point in hiding information inside a gigantic piles of shit, when you need to proccess it all yourself later?
<martm193> estonians say it is a brumous pumping strategy, this is ridiculous profession, to pump brumous to see less
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<martm193> There is a deluded freak show going on on #osdev #allgpuchannels and #opengl very brainless guys are calling me autism and mentally ill person, let them explain to the users what have they really done during 20years, because i beat you in any event really leaving only tears to your eyes
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<martm193> some total outside klange a number 50000programmer in tonga island and even bigger outsider in any real sport event should not publicly scam like this,
<martm193> *outsider
<martm193> And as i said, TCE folks banned me too, but i can judge them being smarter people than all the residents on most crowded channels except LLVM which is seeming to have some sanity in their project
<martm193> TTA is the best arch in the world with VLIW and they do not have members on the channel, they maintain all the new bits continuously most of them automated ways.
<martm193> and some idiots waste their time with kazan and spir-v and shit like this
<martm193> while humiliating , insulting, stalking and aussalting me around the globe
<martm193> idiots, bye
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