Turl changed the topic of #linux-sunxi to: Allwinner/sunxi /development discussion - did you try looking at our wiki? https://linux-sunxi.org - Don't ask to ask. Just ask and wait! - https://github.com/linux-sunxi/ - Logs at http://irclog.whitequark.org/linux-sunxi
<MoeIcenowy> Putti: Do you mean H2 or H2+?
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<luoyi_> codekipper: my work is just based on your code. and you can try the http://www.kozco.com/tech/LRMonoPhase4.wav test file. left & right channel have been merged together
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<Putti> MoeIcenowy, according to all the online stores I looked at it is H2.
<KotCzarny> putti: link?
<KotCzarny> 1.5ghz?
<KotCzarny> copy pasta
<KotCzarny> 100% it's just h2+
<Putti> it would be real nice dev board because it could do tftp booting
<Putti> hmm, I can buy it and we will see, it's 20€.
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<Putti> was there some manufacturing problems with the H2 or some other reason why for example the wiki is not having anything about H2?
<KotCzarny> maybe because there is no h2
<KotCzarny> only h3- (called h2+)
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<Putti> okay, and it also appears that allwinner SoC product page doesn't mention anything about those pluses or minuses, so I conclude they market the plus as just "H2".
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<Net147> oliv3r: did you manage to get the LCD working?
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<scelestic> i seem to have lost cpufreq on my orange pi plus2 when i upgraded to kernel 4.12 (using megous' kernel source) it worked with 4.10 but i cannot figure out what changed, i'm still using the same kernel config and dts. anyone an idea what i might be missing?
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<[TheBug]> scelestic: check that its even offered in that kernel to be sure, just because it is in your .config doesn't per se mean that the kernel had it in its source -- I forget what exact heading its under but if you look around you should be able to figure out cause there should also be the other options to choose if it isn't available.
<scelestic> on 4.10 cpufreq-info seems to be using CONFIG_CPUFREQ_DT and that is enabled in 4.12 as well
<scelestic> might try and see if 4.11 still works to pinpoint what happened
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<Putti> I'm looking at new H3 ethernet code: http://marc.info/?l=devicetree&m=148724976510466&w=2 – what does 0x104 represent in "reg = <0x01c30000 0x104>;". I concluded that 0x01c30000 is for the emac base address but the other value is a mystery for me.
<mripard> Putti: this is supposed to be the size of the memory map
<Putti> mripard, thanks!
<mripard> but it's wrong, it should be 0x10000
<mripard> montjoie: can you send a patch to fix this ?
<Putti> mripard, there might be already a fixed version, that was just some email, I saw multiple revisions of the patch set
<mripard> Putti: I just checked, at least on the H3 it's still there
<Putti> ok
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<Putti> mripard, I looked at the H3 datasheet, section "4.1. Memory Mapping" – it says the size for EMAC is 0xFFFF or 64K. What is this number and where did you get the 0x10000 number?
<Putti> ah, well if I minus EMAC from the GPU address I get 0x10000
<mripard> Putti: 0xffff + 1 == 0x10000 :)
<Putti> aha! :)
<Putti> can any problems arise if you define a smaller memory size (like in this case)?
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<mripard> if you don't access any registers within that window it's fine
<mripard> and I guess this is the case
<mripard> but the bad thing comes when you discover a register that isn't in that window anymore, and you still have that size in the DT
<mripard> and since we don't have the documentation for that controller, it's not that unlikely to happen
<Putti> okay
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