<KotCzarny>
ho hum, sdio power reg seems to be pa9, so to get sdio device listed in /sys i should set it to 1, right?
<KotCzarny>
or i have to initiate sdio scan somehow?
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<KotCzarny>
umkay. got it. echo 1 > /proc/driver/sunxi-mmc.1/insert
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<montjoie>
MoeIcenowy: why there are no emac node in V3S ?
<wens>
no patch?
<wens>
montjoie: can you wait until the rockchip discussion comes to an end?
<montjoie>
wens: yes but the answer from mripard_ seemed to that we have no choice in our case
<montjoie>
perhaps I should have sent the series as RFC
<wens>
we always have a device node, because the binding for the ephy clk/reset is already set :(
<wens>
lets not make it any worse by rushing things
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<montjoie>
wens: ok
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<mripard_>
wens: it's still quite urgent
<mripard_>
it has to be in 4.13
<mripard_>
and if it's not there, we'll have to revert the commits
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<oliv3r>
for the sun5i-gr8, what'st he idea behind this? arch/arm/boot/dts/sun5i-gr8-evb.dts:137: pinctrl-0 = <&i2s0_mclk_pins_a>, <&i2s0_data_pins_a>;
<oliv3r>
both pin-sets identify the same pins
<oliv3r>
and if it's to illustrate the difference between i2s and pcm mode, it's confusing labeling :)
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<nvz>
this whole otg as a host port thing seems really quirky on this sunxi kernel. I have to echo "1" > /sys/bus/platform/devices/sunxi_usb_udc/otg_role 2 times just to get it to actually detect a root hub in dmesg and two more times before it'll detect anything actually on the port so I have to do that 4 times total before I can actually use my keyboard on OTG on 3.4.113-sun8i (latest armbian jessie kernel
<nvz>
running Debian Stretch)
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<MoeIcenowy>
montjoie: because I didn't get it fast enough
<MoeIcenowy>
so it cannot enter 4.13
<MoeIcenowy>
The problems about internal PHY may even make it currently not suitable to submit
<montjoie>
why ?
<MoeIcenowy>
I'm waiting for a final result ;-)
<MoeIcenowy>
In fact for V3s it's not a problem -- V3s has no external MII interface
<MoeIcenowy>
only EPHY
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<oliv3r>
codekipp1r: have you ever done anything with i2s?
<oliv3r>
mripard_: for the gr8, i notice you have exposed the i2s pins via i2s0_mclk_pins_a and i2s0_data_pins_a. Both pins are the same however and are from PB6 to PB9, whereas the i2s block also includes PB5?
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<MoeIcenowy>
P.S. how is L2 cache enabled on sunxi SoCs?
<codekipp1r>
oliv3r: yeah..quite a bit...got it working on quite a few devices
<jernej>
codekipp1r: I think it would be good to make new compatible for hdmi i2s on H3, since it have more channels and few other things that are handle a bit differently than ordinary i2s
<jernej>
and I still don't know why it is working only on 1024x768 resolution
<codekipp1r>
jernej: let me get the first delivery out the way and we can address that
<codekipp1r>
but sure..
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<KotCzarny>
jernej: i needed it not for driver loading but to get sdio id
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