rellla changed the topic of #linux-sunxi to: Allwinner/sunxi /development discussion - did you try looking at our wiki? https://linux-sunxi.org - Don't ask to ask. Just ask and wait! - https://github.com/linux-sunxi/ - Logs at http://irclog.whitequark.org/linux-sunxi - *only registered users can talk*
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<wens> anarsoul|2: we typically wait for the drivers to be merged first, and sometimes we don't notice when that happened
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<anarsoul> wens: mripard: looks like there's a bug in implementation of new clock mode in sunxi-mmc.c in u-boot
<anarsoul> linux driver doubles clock only when ios->timing == MMC_TIMING_MMC_DDR52
<anarsoul> u-boot driver does it unconditionally for emmc
<wens> linux doubles the module clock if either (old timing mode && MMC_DDR52 && width == 8) or (new timing mode && MMC_DDR52)
<wens> doubling it unconditionally shouldn't cause any harm, provided the card clock is properly divided
<anarsoul> if I understand correctly, doubling the clock breaks eMMC for Jagan
<anarsoul> and looks like u-boot driver doesn't set internal divider
<wens> I guess the fix would be to set the divider properly
<anarsoul> we also need to enable new mode on A64 for both controllers
<anarsoul> I'm not sure how to patch it to enable new mode for both controllers on A64 without breaking it on A83 :\
<anarsoul> A83 needs new mode only on eMMC
<anarsoul> A64 needs it on both controllers
<anarsoul> more ifdefs?
<wens> probably, given it's not dt-enabled yet
<anarsoul> does anyone work on porting it to dm?
<anarsoul> I remember that enabling dm mmc pushes SPL size over limit
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<anarsoul> we don't declare support for MMC_DDR_52 anyway, so I'll just drop doubling the clock
<wens> why was the clock doubled in the first place?
<anarsoul> comment says "The MMC clock has an extra /2 post-divider when operating in the new mode"
<anarsoul> but it's not true.
<anarsoul> divider has to be configured.
<anarsoul> u-boot always sets internal divider to 1
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<wens> that should be fixed then
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<anarsoul> wens: check your e-mail
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<wens> replied
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<anarsoul> wens: thanks for review
<anarsoul> I'll wait for more comments and will send v2 tomorrow
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<wens> bluetooth series is out, finally
<MoeIcenowy> wens: for what?
<wens> MoeIcenowy: AP6xxx on several boards
<MoeIcenowy> mripard: is other codecs support for cedrus going to be mainlined?
<MoeIcenowy> wens: serdev?
<wens> MoeIcenowy: yeah, got every one of them working, but A31/H3/H5 need other changes (RTC / PRCM), hence my RTC series coming later :)
<MoeIcenowy> wow good
<wens> about cedrus, IIRC the H264 bits still have some bugs being discussed over in #cedrus
<BenG83> MoeIcenowy, do you know if S3 and V3s have the same SoC ID?
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<MoeIcenowy> BenG83: yes they do
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<fALSO> Sirs
<fALSO> [ 0.001225] /cpus/cpu@0 missing clock-frequency property
<fALSO> this message on dmesg, is it something *bad* or maybe just kind of notice/warning ?
<k4be> i saw it a lot of times, seems to cause no problems
<fALSO> yap, for a while i was using this source for the kernel: https://github.com/megous/linux/tree/orange-pi-4.19
<fALSO> and i think that probably has some patches to *fix* that . maybe the dtb
<fALSO> now im using mainline :-)
<fALSO> [ 0.000000] Linux version 4.20.0-rc1 (root@fishy) (gcc version 8.2.0 (Gentoo 8.2.0-r4 p1.5)) #1 SMP Tue Nov 6 11:30:36 WET 2018
<heatfanjohn> I'm building mainline now
<fALSO> :-)
<fALSO> its probably the : clock-frequency = <1200000000
<fALSO> probably its just cosmetical
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<heatfanjohn> I now know that the GPU isn't needed to have a display on the A64, but is anyone planning to upstream the GPU node for the A64? I don't see it in 4.20-rc1
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<anarsoul|2> go for it?
<fALSO> ;-D
<heatfanjohn> I need to study the how to submit a patch documentation ...
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<anarsoul|2> why not? :)
<BenG83> heh LPC43
<BenG83> I got a couple of those
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<MoeIcenowy> jernej: it's the thermal camera sensor that worth the price ;-)