rellla changed the topic of #linux-sunxi to: Allwinner/sunxi /development discussion - did you try looking at our wiki? https://linux-sunxi.org - Don't ask to ask. Just ask and wait! - https://github.com/linux-sunxi/ - Logs at http://irclog.whitequark.org/linux-sunxi - *only registered users can talk*
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<smaeul> another update: I wrote an irqchip driver for Linux and dispatch code on ARISC side to forward NMIs over the msgbox when Linux is running
<smaeul> so now the power key can be used as a key input in linux, and also a wakeup source for ARISC: http://ix.io/1sxG
<smaeul> this lets the native Linux ax803 driver work with r_intc removed from the device tree -- now all I have to do is rearrange some addresses to get the PMIC code in ATF to fit, and hopefull that'll mean functioning suspend/resume on the pinebook, without breaking anything else
<smaeul> no promises though :)
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<anarsoul> smaeul: nice! :)
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<wens> anarsoul: amixer output: https://pastebin.com/4Dr9Mhmi
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<jaganteki> wen, Hi
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<jaganteki> any inputs on the TCON0_DCLK_REG wrt Bananapi S070WV20-CT16 ICN6211 MIPI-DSI
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<wens> I don't have my panel connected anywhere, so I can't help you with it
<wens> the interaction between TCON and MIPI-DSI might be the problem. If the timings are off, it doesn't work
<wens> jaganteki: I've not played with DSI, so you should probably ask mripard or qschulz
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<jaganteki> wens, oka. just want to check the value in case of RGB
<jaganteki> since the same panel has RGB interface, I thought you have tested the same
<wens> the RGB interface works, I just don't remember what the value for the divider
<wens> keep in mind that DCLK is for the data transfer between the TCON and DSI emitter, which is not RGB
<wens> jaganteki: again, I'm not familiar with the details. ask people that have actually worked on it
<jaganteki> wens, ok thanks
<wens> I doubt DCLK would be 30 MHz. IIRC the bus width and format for TCON <-> DSI is not the same as RGB
<jaganteki> Ohh.. and do you recomment bridge driver for that or panel driver is ok?
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<wens> bridge driver is going to be more flexible
<wens> but how the power is routed on the board (shared GPIO for the whole) makes it really tough to do :/
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<wens> well, probably not. the regulator framework handles shared GPIOs just fine
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<jaganteki> wens, true.. I tried something for bridge driver. https://github.com/amarula/linux-amarula/commit/d5f5d96a959eb885d520fc4ab6835d14c11d2e0d
<jaganteki> but the thing that block me is clock, since 30Mhz wont' work with TCON0_DCLK
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<wens> jaganteki: 30 MHz is what the panel wants, i.e. what the bridge is supposed to output
<wens> jaganteki: not what DSI should output to the bridge
<wens> and probably not what the tcon should output to the DSI block
<wens> jaganteki: multiple people have been saying this to you. DSI rates depend on other things
<jaganteki> wens, but the DSI tcon is computed based on clock
<wens> maybe that needs fixing?
<wens> I honestly don't know
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<wens> have you looked at what the BSP does?
<jaganteki> they simply use div 6
<jaganteki> for all panels.
<jaganteki> sorry 4
<wens> sounds broken :(
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<anarsoul> wens: hm, I'm really not sure
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<anarsoul> can you try my archlinux image on pine64?
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<anarsoul> wens: here's my amixer output: https://dpaste.de/u7NN/raw
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<anarsoul> wens: jaganteki: regarding dclk: that's dotclock from tcon to dsi, it doesn't have to be the same as dotclock from dsi to panel
<anarsoul> MoeIcenowy: IIRC you tested my audio patches at least on pinebook - have you had any issues with them?
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<jaganteki> anarsoul,but the sun4i_dclk_round_rate from dotclock is taking input from panel clock and compute the best_div
<jaganteki> so that the tcon_dsi will update the same div value
<jaganteki> line 2, 55, 56 on above log
<anarsoul> what I'm saying is that DSI module inside A64 may do some transformations
<anarsoul> it's just a guess anyway
<anarsoul> or maybe your dsi to rgb bridge is doing some transformations
<anarsoul> I'd bet on latter if it works fine for other panels
<jaganteki> unforntunetly I'm unaware of bridge transformation details, wens: do you?
<anarsoul> anyway, it's bed time here. Good night
<jaganteki> Good night, anarsoul, thanks for the details.
<anarsoul> jaganteki: if you have possibility check with the scope what you're getting from A64 and what you're outputting to the panel
<wens> anarsoul: found that the DAC digital part mod clock and reset were not toggled on mine. I'll check the graphs and widget definitions
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<wens> jaganteki: nope
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<MoeIcenowy> anarsoul: no
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<wens> anarsoul: found the final missing piece. regulator for cpvdd (charge pump for the headphone amp) was not enabled
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<wens> anarsoul: reason it worked on pine64-lts and pinebook is because they use lpddr3, which are powered from the same regulator as cpvdd
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<willmore> smaeul, yay!!!
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<plaes> smaeul: congrats!
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<plaes> argh.. spelled linux-sunxi mailing address wrong
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<anarsoul> wens: that's not lpddr3, ELDO1 (aka cpvdd) is used as vqmmc-supply (for WiFi), and I have it enabled in my tree
<anarsoul> for all pine64 boards, including pinebook
<anarsoul> well, not only lpddr3
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<anarsoul> wens: thanks for figuring that out anyway
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