<KotCzarny>
afair there was no android5 for allwinner socs
<KotCzarny>
so it's either 4.4.x or 7.x
<KotCzarny>
just saying what you can expect regarding specs being honest
<KotCzarny>
or correct
<MoeIcenowy>
KotCzarny: I'm sure that when I purchase one of my A33 tablet the seller says it can be flashed with L
<KotCzarny>
dont nuke the android once you get it, you will need some data from it
<MoeIcenowy>
K/N is only for H3
<KotCzarny>
MoeIcenowy: is there any bsp with droid5 ?
<MoeIcenowy>
KotCzarny: A64.
<KotCzarny>
ho hum
<MoeIcenowy>
A64 have no K, the start is L
<KotCzarny>
good to know
<KotCzarny>
i wonder if it could be ported to h3
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<KotCzarny>
interestingly a64 also has droid8.1
<MoeIcenowy>
KotCzarny: they're different BU
<KotCzarny>
huh, 28GB o.O
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<catphish>
KotCzarny: interesting, it certainly claims to be android 5.1, but meh, i don't intend to run android on it :)
<KotCzarny>
as i've said, before you nuke it, you will need some data from it to support it in linux
<catphish>
KotCzarny: what do you think i'll need from android before i nuke it?
<Wizzup>
firmware for one
<KotCzarny>
touchscreen often comes with firmware
<KotCzarny>
which is set at factory to your device
<KotCzarny>
and cant be regenerated by yourself
<catphish>
interesting, i naively assumed touchscreen was easy
<KotCzarny>
and things like fex/dt to see what is there and how configured
<KotCzarny>
it is easy, as long you have all information and files
<catphish>
probably best just to dump its whole flash to a file before i start
<KotCzarny>
yup, it's not a bad idea
<catphish>
how do they usually boot? just from a bootloader on the built in flash i assume?
<KotCzarny>
in allwinner land boot priority is usally: spi / sdcard / emmc / nand / fel(usb)
<catphish>
i've never used an a64 but hoping its similar enough to the a20 i'm currently playing with, the manual will say the bot order i'm sure, though i think it's configurable by some pins
<KotCzarny>
there are exceptions with burned security bits, but those are rare luckily
<catphish>
i'll be unhappy if they set the secure boot, but hopefully they haven't :)
<catphish>
anyway, just thought it would be a fun device to play with for not too much money
<catphish>
and a documented soc :)
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<mickenx>
I abused a tablet once .. boldted on a usb memory with linux , hacked the booter to mount linux instead of flash android
<catphish>
i'm not 100% sure of the safest process to hack it without bricking it yet :)
<catphish>
the dev board is much safer because it doesn't have internal flash :) so i can always reflash it externally
<adityaxavier>
Got it.. however, wanted to get busybox reboot to work.
<Putti>
adityaxavier, you need to look at the commands/script used to generate the image
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<adityaxavier>
Am not sure I understand what you saying..
<adityaxavier>
the script to generate the image is written by me. I compile u-boot ( provided by icenowy ), + dtb + zImage ( compiled using 4.19 + patches submitted by icenowy) + rootfs
<adityaxavier>
am installing using sunxi-fel spiflash-write
<Putti>
so you know which dts you are using then?
<adityaxavier>
Yes.. Have been modifying the dts for my requirements.. like adding spi based ethernet..
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<Putti>
okay, anyways this looks like it could be just a userspace issue or missing CONFIG_MAGIC_SYSRQ in kernel?
<KotCzarny>
you should have watchdog device to write to
<KotCzarny>
via echo
<KotCzarny>
sysrq is just even hackier workaround
<Putti>
KotCzarny, what is usually used for it?
<KotCzarny>
dont have my machine handy to check atm
<adityaxavier>
I have a watchdog timer registered in the dts..
<Putti>
adityaxavier, sounds promising! Let's figure out which driver uses that
<Putti>
maybe it is just disabled :P
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<Putti>
CONFIG_SUNXI_WATCHDOG
<adityaxavier>
Yes I don't have that enabled.. but it seems it needs Depends on: WATCHDOG [=y] && (ARCH_SUNXI [=n] || COMPILE_TEST [=n])
<adityaxavier>
Does that mean ARCH_SUNXI == n ?
<Putti>
no it depends on depends on ARCH_SUNXI || COMPILE_TEST
<Putti>
you have to have either of those y
<Putti>
i.e. enabled
<Putti>
I think [=n] is just the default value
<Putti>
adityaxavier, please let us know how it goes :)
<adityaxavier>
Trying to configure it correctly right now..
<adityaxavier>
Give me a minute..
<adityaxavier>
Got it selected.. compiling and testing..
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<adityaxavier>
Compiled.. flashing. BTW I have not enabled CONFIG_MAGIC_SYSRQ
<adityaxavier>
Putti I got it working..
<adityaxavier>
It really was that simple, just forgot to enable the watchdog driver.. Gosh am feeling really stupid..
<adityaxavier>
I was thinking maybe I forgot to register something in dts.
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<Putti>
adityaxavier, that's so great! :)
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<Putti>
it was nice to learn that one needs a watchdog hardware / driver for reboot
<KotCzarny>
nah, it's a hacky workaround
<Putti>
KotCzarny, what is the proper way?
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<KotCzarny>
on boards implementing openrisc, sending it soc reset request
<KotCzarny>
but you can just peek into kernel's reset routine for sunxi boards
<KotCzarny>
code is the best explanation
<adityaxavier>
from my embedded programming information.. watchdog timer is used to tell the kernel that some program has hung .. which makes the MCU reboot...
<Putti>
KotCzarny, what part of the kernel contains the reset routine for sunxi boards?
<adityaxavier>
I think that's there in drivers/reset/sunxi ...
<KotCzarny>
probably board.c or somewhere nearby
<adityaxavier>
it requires a dts entry though..
<Putti>
thanks
<KotCzarny>
was a long time ago i peeked there
<adityaxavier>
which made me go into this rabbit hole..
<KotCzarny>
adityaxavier: watchdog is just a specialized piece of silicon, one of the functions is soc reset
<adityaxavier>
Yeah.. there are two type os watchdog.. If I remember right.. though its STM / nRF MCU information..
<adityaxavier>
Independ
<adityaxavier>
Independent and Normal.. meant to be timers right ? which simply count down and should be reset within a particular time, if not would reset the MCU..
<adityaxavier>
Is it the same in linux / sunxi as well ?
<Putti>
adityaxavier, we can find out! :P
<KotCzarny>
i guess so
<KotCzarny>
poke the watchdog or it will get angry
<KotCzarny>
or just tell it to get angry right away
<adityaxavier>
BTW, am also having few issues wrt root partition..
<adityaxavier>
I have the entire OS in a 16MB spi NOR..
<adityaxavier>
which means I don't have much space for root partition.. currently am squeezing around 11 MB..
<adityaxavier>
I was having issues with jffs2 partition type, basically the flow was 1. reboot ( It won't reboot and would get stuck ) 2. hard reboot using button 3. jffs2 fs is corrupt,,
<adityaxavier>
You think I should switch over to ext2 / 4 ?
<KotCzarny>
on spi flash? you are kidding
<adityaxavier>
I don't know what the minimum fs size is allowed on ext2 / 4
<KotCzarny>
its not the size, it's wear
<adityaxavier>
Why do you think wear would be an issue ? I don't have syslog. Kernel is loaded in RAM..
<adityaxavier>
so no logging is happening at all..
<KotCzarny>
if you fill it highly, how many blocks would be in use?
<KotCzarny>
jffs2 tries to use the free space equally
<KotCzarny>
with extX you would be writing the same cells over on file/dir update
<KotCzarny>
spi is good as a boot partition, but trying to use it as an os partition isnt good idea i guess
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<adityaxavier>
Oh. I thought NOR has few millions of writes allowed.. slow but lots..
<KotCzarny>
sure, but if you start updating the same cells over and over you could get there quick
<Putti>
adityaxavier, do you need to write anything to the spi flash or can you just use it readonly?
<adityaxavier>
Well initially for testing / development I wanted to keep it RW.. then change it to RO.
<KotCzarny>
do you have usb working?
<KotCzarny>
or microsd?
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<adityaxavier>
I wanted to.. however the board I have doesn't have one..
<adityaxavier>
I have USB working though..
<adityaxavier>
Are you thinking of usb mass storage and mounting it as root fs ?
<KotCzarny>
not root fs, but r/w data storage
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<KotCzarny>
overlayfs maybe if you need tweaking /
<adityaxavier>
Hmm.. that is definitely a great idea..
<adityaxavier>
BTW, Are there any patches available to allow u-boot to boot off of SPI NAND..
<adityaxavier>
The u-boot I have is 2018-01
<adityaxavier>
I believe the newer one has, but upgrading would involve taking all the patches along with it, which would be extremely time taking.. :(
<Putti>
hmm, so based on my reading the only useful thing you can do currently with sunxi_wdt driver is start the watchdog and that causes a soc reset. Nothing else, right?
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<Putti>
adityaxavier, what was the other type of watchdog you mentioned the STM chips have?
<adityaxavier>
They basically have two types of watchdogs .. IWDG and WDG.. Independent is basically a completely independent timer so that even if there is problem with the internal timer this IWDG timer will shut it down..
<Putti>
ah, that's what you meant
<Putti>
I thought there were other uses for the HW watchdog besides just resetting the device
<adityaxavier>
WDG basically work by counting down at a particular freq, to a particular number.. which unless has not be reset by the program would reset the device..
<adityaxavier>
Well WDG has always been mainly for checking whether the MCU / HW is working right.
<adityaxavier>
If not reset the device.. There can be a possible implementation of using WDG timer as a normal timer as well.. just need to reset the flag before WDG reaches it..
<Putti>
okay
<adityaxavier>
Ok. Thanks guys.. Going to bed.. I'll check in tomorrow..
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<catphish>
anyone know how to prepare a bootable usb for a20?
<KotCzarny>
a20 cant boot from usb
<KotCzarny>
only spi/sd/emmc/nand
<catphish>
oh ok, shame
<KotCzarny>
but once you load uboot, you can have rootfs on usb
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<catphish>
the datasheet says it can :(
<catphish>
but in practice nothing seems to happen
<KotCzarny>
does it talk about fel?
<KotCzarny>
or usb as in usb-flash
<catphish>
it doesn't specify, so it could be something proprietary
<catphish>
the datasheet implies that usb boot is a totally different process from the regular flash boot though, so i suspect that's it
<KotCzarny>
it's very useful to have
<KotCzarny>
especially when you develop something
<KotCzarny>
saves you a lot of card swapping/writing
<KotCzarny>
but it could also provide disk-less clusters
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<catphish>
my sd card slot is broken, so it's a bit tedious swapping cards, but doesn't look like usb is going to help me particularly
<[TheBug]>
lol is it a microSD card slot
<[TheBug]>
I just ordered 4 from china hehe
<[TheBug]>
have one extra ;p
<[TheBug]>
well assuming you are maybe in USA
<[TheBug]>
:Z
<[TheBug]>
and you feel comfortable with a soldering iron
<catphish>
yeah micro-usb, it's got some kind of mechanism that holds the card but it doesn't work properly, i have to press a clip with a pin to make the card stay
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<banned-why>
seems like I'll need to wait for my cp2102 be delivered from china
<banned-why>
ordered it a moment ago
<banned-why>
no way I can proceed with my own research without one
<banned-why>
until its delivered I'll have a break from this channel :)
<KotCzarny>
if you have more than one board you can connect them together and one could act as a serial console
<banned-why>
I don't own another one.
<banned-why>
however I can wait... longer two weeks until it arrive
<KotCzarny>
but ANY 5V uart will do, for example some phone 'flashing' cables have them with just weird connecter at the end
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<banned-why>
yes KotCzarny I know about this because once my tl-wr1043nd bricked when a wrong image was flashed to the ROM
<banned-why>
had to buy one cp2102 to fix it
<banned-why>
however on the dd-wrt wiki it mentions that some phone 'flash' cables do contain the cp2102 inside the coating next to the usb male connector
<banned-why>
I don't have any of those laying around
<banned-why>
the cp2102 got damaged after it was connected to a 19v pin from a router I was trying to get access
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<JuniorJPDJ>
can someone help me run audio on a31s tablet?
<JuniorJPDJ>
I managed to run audio on a13 tablet without any problems
<JuniorJPDJ>
but on a31s I don't know how to create audio routing table in codec in dts
<JuniorJPDJ>
i tried 2 or 3 example tables (one from dts docs, and 2 from other devices)
<JuniorJPDJ>
none gave me sound output on headphone jack or speaker
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