<willmore>
miasma, good point. tllim thanks for the info!
<tllim>
wc
<tllim>
however, BSD folk made the PCIe driver works.
<tllim>
but seems like the implementation cannot apply to Linux
<anarsoul|2>
tllim: it'll work with limitations even for BSD
<anarsoul|2>
basically they have mmio access wrapped, it's not the case for linux
<tllim>
^^^ thanks on the explanation
<anarsoul|2>
and it won't work with drivers that use direct mapping, but as far as I understand there's not a lot of drivers in BSD which do that
<willmore>
That was what I was guessing. That used to be the case with Linux over a decade ago, but they stopped doing it for performance reasons, IIRC.
<anarsoul|2>
e.g. GPU drivers are unlikely to work
* willmore
pictures a 2080RTX plugged into an Opi3....
<anarsoul|2>
:)
<willmore>
Yeah, I feel comfortable telling that person that it's not going to work.
<anarsoul|2>
willmore: some wifi cards won't work either
<anarsoul|2>
anything that needs more than 64kb of mmio space won't work
<willmore>
There's not a really easy way to tell that ahead of time, is there? Maybe make some observations on a machine with fully working PCI-E?
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<anarsoul|2>
willmore: lspci -vvv should tell you :)
<anarsoul|2>
anyway, it was pretty weird decision for allwinner to implement pcie like this... My guess is that their SoC is 32-bit inside so they didn't have a choice
<anarsoul|2>
I mean address bus is 32-bit
<MoeIcenowy>
anarsoul|2: they have.
<MoeIcenowy>
32-bit bus is not a restriction
<MoeIcenowy>
and Allwinner do have a lot of free space around PCIe memory space
<anarsoul|2>
oh, OK
<willmore>
Someone picked the wrong PCI-E IP, then.
<willmore>
Or, just maybe, we're not the intended users of this SoC and the intended users will only pick simple things that can live with the limitations. And that simpler limitation allowed them to save on silicon area and make the chip cheaper.....
<willmore>
But no point in being reasonable.
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<MoeIcenowy>
willmore: yes
<MoeIcenowy>
the intended usage is for WLAN
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<paulk-leonov>
hi
<paulk-leonov>
jaganteki, mripard: is there any reason why DRAM ODT is not enabled on most H5 boards in u-boot although their clock frequency is quite high?
<paulk-leonov>
If not, I'll probably make it the default
<paulk-leonov>
also the boards that don't have ODT enable do specify a ZQ value, which doesn't really makes sense...
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<jaganteki>
paulk-leonov: never seen any issue on H5 w/o ODT before unlike I have seen with A64. did you find any issue?
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<paulk-leonov>
jaganteki, no it's not really about an issue in particular, it's just that ODT is usually required for these frequencies and specifying a ZQ without ODT enables doesn't make sense, so I'm trying to understand what lead to this situation
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<paulk-leonov>
do you have a clue?
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<jaganteki>
paulk-lenov: as I said, may be no one tried or see any issue ie reason it didn't enable. but we may use it for H5 since A64 share same controller from dw. except any diff in drm board logic btween them
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<paulk-leonov>
jaganteki, that seems like a very uncertain approach... I will send out patches enabling ODT by default on H3/H5 and keep the boards that don't have it enabled with the config not set
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<jaganteki>
paulk-leonov: okay
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<MoeIcenowy>
maybe this will advance stability?
* MoeIcenowy
a DRAM dumb that was forced to write some DRAM driver
<megi>
that would be unfunny, if the schematics was right ;)
<megi>
is there some point to having an id-det on usb port, and not being able to turn off the VBUS voltage on the board side? it's probably unusable as a device unless you modify the cable and cut off the vbus
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<lvrp16>
lol
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<Mangy_Dog>
its looking more likely im going to use the orange pi zero 2 plus h5 based board for this gaming machine... it has 2 usb ports on its breakout... AND stereo audio out
<Mangy_Dog>
so i dont need a decoder
<Mangy_Dog>
just a amp
<Mangy_Dog>
nor do i need to put on a usb hub for the single port on the bananapi
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<Mangy_Dog>
hmmm the usb otg plug.... what is it good for? Can it be used to emulate a usb drive? IE to read the onboard flash and sd card slot?
<KotCzarny>
yes
<Mangy_Dog>
ahh good so its not just a power plug
<Mangy_Dog>
only issue though is that applies power to the board when its plugged and it would boot right away wont it? theres no start up power button on this board
<KotCzarny>
you can power the board via gpio pins
<Mangy_Dog>
yeah was going to... as its goign to be mainly battery powered
<Mangy_Dog>
but im trying to think of a way to use the otg port to charge the battery without turning on the soc
<KotCzarny>
with Hxx soc series you dont get power chip
<Mangy_Dog>
ah
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<KotCzarny>
if you want battery and related functionality, you might look into Axx series
<KotCzarny>
hint: Axx series go into tablets, Hxx go into tv boxes etc
<KotCzarny>
so you might want to look into A64 based boards
<Mangy_Dog>
i hope i wont have to tbh... i really like the form factor of this little board... and its break out is perfect for the most part.... and i dont want to have to buy another soc :p
<Mangy_Dog>
any in this zero mini form factor?
<KotCzarny>
check what pine folks came up with
<Mangy_Dog>
ok ill take a look
<KotCzarny>
hmm, nothing small enough apart from sopine
<KotCzarny>
so scratch that idea
<KotCzarny>
orange pi win is a64 based tho
<Mangy_Dog>
yeah just about to say sophine could work if i had a dim slot for it
<veremitz>
and that git repo .. 2 years ago latest update .. >,<
<hanni76>
I know
<veremitz>
that said, all the sources for that 'generation' of software seem to be present in the repo .. I just wouldn't deviate from that .. as it likely won't be compatible, and bisecting the changes could be painful!
<hanni76>
I know I can get mainline
<hanni76>
I need to test MIPI DSI panel with the old BSP code
<hanni76>
yes, all the sources is there...
<hanni76>
but the sd-card image created can't boot
<hanni76>
I was thinking I could take only kernel from the repo and use modern u-boot
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<jernej>
wens, mripard: I think we have a problem with aarch64 gcc 8.3.0 (maybe also earlier) and GENMASK(-1, 0) (used for missing clock factors)
<jernej>
we rely on GENMASK(-1,0) being 0, but on my system it evaluates to 0xFFFFFFFFFFFFFFFF
<jernej>
and that naturally breaks clocks
<jernej>
I noticed that when I set CLK_SET_RATE_PARENT for "de" clock on H6
<jernej>
it works ok if literals are used, e.g. GENMASK(-1, 0)
<jernej>
but with variables, e.g. shift = 0, width = 0, GENMASK(width + shift - 1, shift)
<jernej>
it's 0xFFFFFFFFFFFFFFFF
<jernej>
any idea what to do?
<anarsoul|2>
what about GENMASK((width + shift - 1), shift)?
<jernej>
it shouldn't make any difference since GENMASK already puts each macro argument into own brackets
<jernej>
and I tried different casts too
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<jernej>
according to C standard, behaviour is undefined if shift equals width of left operand
<jernej>
so it seems we relied on undefined behaviour