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09:33
<
mps >
is it possible to load dtb after boot
09:33
<
mps >
and if, how?/
09:43
<
buZz >
i dont think so
09:44
<
mps >
so only on boot?
09:45
<
mps >
ok, another question, how to specify dtb overlay for u-boot using extlinux.conf? is that supported by u-boot
09:48
<
buZz >
why would you use syslinux when you're using uboot?
09:48
<
mps >
buZz: u-boot can use extlinux.conf file
09:49
<
mps >
we are using it by default on alpine linux for arm
09:50
<
mps >
no, dtb is easy to specify, but I have no idea how to specify DTB overlays
09:51
<
mps >
FDT or FDTDIR can be used in extlinux.conf
09:51
<
mps >
for example: FDTDIR /dtbs-edge
09:52
<
mps >
and u-boot finds proper dtb file for board
09:53
<
buZz >
hmhm, i'm not really seeing a method to specify which dtbo to load
09:53
<
buZz >
if you're building your own kernel already, you could just merge the dtbo into the dtb :P
09:55
<
mps >
yes, but I'm trying to build 'vanilla' dtb and add some dtbos as option for our users
09:57
<
mps >
and for my 'personal' use, ofc
09:59
<
buZz >
but doesnt specify how
10:01
<
mps >
ah, good. now I know what to search in u-boot source. thanks for url :)
10:03
<
mps >
'fdt apply <addr> - Apply overlay to the DT'
10:13
<
JohnDoe_71Rus >
does someone work with aosp/lineageos except linux kernel sunxi?
10:20
<
KotCzarny >
there was some project
10:21
<
KotCzarny >
dont expect hw accel tho
10:21
<
KotCzarny >
i think only 3d was added
11:34
<
bauen1 >
as far as i understand it, the rom mapped at 0x0000 - 0xFFFF is selected by the secure bit of the lcjs efuse
11:35
<
bauen1 >
so you could boot some code that writes a 1, then dumps the memory, but as soon as you poweroff the board you have a brick
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<
bauen1 >
ironically only a "bricked" board or the sbrom dump can tell if there are any backdoors to the secure boot
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15:11
<
MoeIcenowy >
bauen1: no idea
15:11
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15:11
<
jernej >
Stack pointers: sp_irq=0x00021400, sp=0x00053FE4
15:11
<
MoeIcenowy >
bauen1: I had a H2+ board that is burnt to be secure boot (but it's not bricked because I never write any keys into it -- when no key is present in eFUSE any signed BL is accepted)
15:11
<
MoeIcenowy >
on user manual?
15:11
<
bauen1 >
MoeIcenowy: Thanks, I actually disassembled part of the h3 sbrom to verify that behavior
15:11
<
bauen1 >
i do hope that behavior is also present on the h5 (or the h6)
15:11
<
bauen1 >
MoeIcenowy: is it also possible to dump from u-boot ?
15:11
<
jernej >
MoeIcenowy: I'm working on H616 support in sunxi-fel but I'm not sure how to determine swap_buffers array for it. Any advice?
15:11
<
MoeIcenowy >
jernej: refer to my V831 one?
15:11
<
jernej >
I tried, but it isn't working
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15:11
<
MoeIcenowy >
add -v to sunxi-fel
15:11
<
MoeIcenowy >
jernej: when trying to do `sunxi-fel spl`
15:11
<
MoeIcenowy >
it will print two SPs (one for normal and one for IRQ)
15:11
<
MoeIcenowy >
these values can be taken for reference for how the BROM allocates memory
15:11
<
jernej >
h6_sram_swap_buffers
15:11
<
MoeIcenowy >
for V831 sp_irq is at 0x21xxx and normal sp is at 0x5xxxx
15:11
<
MoeIcenowy >
and I dumped SBROM by JTAG
15:11
<
jernej >
interestingly, that 0x5xxxx range is undocumented
15:11
<
MoeIcenowy >
jernej: what do you mean "documented"
15:11
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15:11
<
MoeIcenowy >
(because V831 says 96K SRAM A1, H616 only says 32K
15:11
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15:11
<
jernej >
yes or android DT
15:11
<
bauen1 >
actually i might as well go for a board with an h6 since the user manual has a few more details and you can configure the boot sequences to some extend
15:11
<
MoeIcenowy >
my user manual copy shows SRAM C is at 0x28000~0x57FFF\
15:11
<
MoeIcenowy >
jernej: try to copy my v831 one and change 0x38000 to 0x28000 ?
15:11
<
MoeIcenowy >
if you ported it to H616, then it should succeed
15:11
<
jernej >
it works if I write bin version to 0x20000 and execute it
15:11
<
MoeIcenowy >
not ported version of it will be trapped into self-spinning
15:11
<
jernej >
but not with spl command
15:11
<
MoeIcenowy >
jernej: how is your swap buffer now?
15:11
<
jernej >
{ .buf1 = 0x21000, .buf2 = 0x28000, .size = 0x1000 },
15:11
<
MoeIcenowy >
try move buf2 around?
15:11
<
MoeIcenowy >
from 0x28000 to 0x50000, try every 0x1000
15:11
<
jernej >
s/cleat/clear/
15:11
<
jernej >
just to be cleat, command "sunxi-fel -v spl uart0-helloworld-sdboot.sunxi" should succeed then, right?
15:11
<
MoeIcenowy >
jernej: did you port uart0-helloworld-sdboot?
15:12
<
jernej >
oh, this will be fun :)
15:13
<
jernej >
I wonder how those "something important" entries were determined for older SoCs
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15:38
<
jernej >
MoeIcenowy: my mistake, I used system sunxi-fel instead of modified when I tried spl command. Above line works perfectly fine.
15:38
<
jernej >
thanks for the help!
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<
bauen1 >
it also looks like the h6 is lacking the secure peripheral controller the h5 has
16:54
<
bauen1 >
or at least it isn't in the manual
16:54
<
bauen1 >
only access to the SID or keysram requires secure mode
16:55
<
bauen1 >
don't you also need some place to put the secure code that isn't writable by non secure code ?
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