#linux-sunxi on 2020-10-28 — irc logs at freenode.irclog.whitequark.org

2018-08-03 10:18 rellla changed the topic of #linux-sunxi to: Allwinner/sunxi /development discussion - did you try looking at our wiki? https://linux-sunxi.org - Don't ask to ask. Just ask and wait! - https://github.com/linux-sunxi/ - Logs at http://irclog.whitequark.org/linux-sunxi - *only registered users can talk*

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06:22 <qdk0901> aw_fel_read/aw_fel_write is very slow in sunxi-tools, any improve?

06:23 <qdk0901> this cause sunxi-fel read/write speed limit to under 200kB/s

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08:10 <bauen1> https://www.pine64.org/2020/10/28/nutcracker-challenge-blob-free-wifi-ble/

08:15 <bauen1> probably involves reverse engineering an ~8mb blob (https://github.com/pine64/bl_iot_sdk/blob/master/components/bl602/bl602_wifi/lib/libbl602_wifi.a) (if i'm understanding it right)

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08:30 <plaes> qdk0901: feel free to look into ways to improve it: https://linux-sunxi.org/FEL/USBBoot#Adding_support_for_new_SoC_variants

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09:08 <clementp[m]> bauen1 yes that what I understood too. I don't have lot of knowledge about zephyr but is it a good move to add the Bl602 support in zephyr instead of using freertos ?

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09:13 <bauen1> i suppose once the blob has been reverse engineered you could port it to zephyr too ?

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09:23 <karlp> clementp[m]: why zephyr?

09:29 <bauen1> there's a few more blobs that would need replacements https://github.com/pine64/bl_iot_sdk/tree/master/toolchain/riscv (gcc toolchain), https://github.com/pine64/bl_iot_sdk/tree/master/image_conf (flash image generator and a few other blobs), https://github.com/pine64/bl_iot_sdk/tree/master/tools (some other tools)

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09:34 <clementp[m]> karlp: for what i undertstand they have a correct BLE stack which is not the case with FreeRTOS no ?

09:35 <bauen1> lol gcc is from the sifive tools: `Configured with: /var/lib/builds/sifive-tools/freedom-tools-master/obj/x86_64-linux-centos6/build/riscv-gnu-toolchain/riscv-gcc/configure [...]`

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09:42 <clementp[m]> https://github.com/bouffalolab/bl_iot_sdk/issues/1

09:42 <clementp[m]> @maidenone @Avamander @rafacouto Thanks for your feedback. We are preparing documents with more details. For stack part, it's a little complex, and will take more time & resource to deal with. We will consider this requirement seriously. Thanks again.

09:44 <bauen1> yeah this is looking quite interesting

09:45 <karlp> other than being riscv, what's actualyl more interesting abotu this ble chipset than any of the existing ones?

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09:52 <clementp[m]> price

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20:01 <megi> it looks like they'll be opening more of the apis

20:01 <megi> https://github.com/bouffalolab/bl_iot_sdk/issues/1#issuecomment-717996607

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22:23 <clementp[m]> They can't share the HW/PHY register because it's not there IP ?

22:23 <clementp[m]> Their*

22:23 <clementp[m]> But it's nice that they open this layer :)

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