02:36 <futarisIRCcloud> https://github.com/ucsdsysnet/corundum

02:36 <tpb> Title: GitHub - ucsdsysnet/corundum: Open source, high performance, FPGA-based NIC (at github.com)

02:36 <futarisIRCcloud> https://github.com/ucsdsysnet/verilog-ethernet

02:36 <tpb> Title: GitHub - ucsdsysnet/verilog-ethernet: Verilog Ethernet components for FPGA implementation (at github.com)

03:14 <futarisIRCcloud> https://www.ebay.com.au/itm/SQRL-Squirrels-Research-BCU-1525-FPGA-blockchain-edition-Xilinx-VU9P/223577171107

03:14 <tpb> Title: SQRL Squirrels Research BCU-1525 FPGA blockchain edition (Xilinx VU9P) | eBay (at www.ebay.com.au)

10:13 <dkozel> npcomp: zyp: My Thunderbolt 3 enclosure arrived and the SQRL is powered in it. However I have an issue where no PCI bus number is available for adding the hot-plugged bridge chip

10:15 <dkozel> Debugging that somewhat today. I'm using an FTDI board for JTAG

10:30 <zyp> nice, what are you using as a host?

10:39 <dkozel> my desktop. Asrock x570 Gaming ITX

10:40 <dkozel> https://twitter.com/derekkozel/status/1203419822756945920

10:40 <dkozel> I spec'd it for exactly this type of application

10:47 <dkozel> It's increasingly looking like a BIOS bug with this motherboard.

11:00 <zyp> I see

11:00 <daveshah> I had to add a kernel parameter for this issue

11:00 <daveshah> Let me dig out what i needed

11:01 <dkozel> !

11:02 <daveshah> pci=realloc,assign-busses,hpbussize=0x33

11:02 <daveshah> This was on an AMD motherboard

11:02 <daveshah> but it sounds familiat

11:02 <daveshah> *familiar

11:03 <daveshah> I think this kernel command line setting should work around most TB/PCIe related BIOS issues

11:03 <dkozel> Ok, will add and reboot!

11:03 <dkozel> is that final parameter something I'm likely to need to tune?

11:04 <daveshah> I think I just copied it from somewhere else and it worked

11:05 <dkozel> OK, that's reserving 0x33 bus numbers, seems excessive for any application. :)

11:15 <dkozel> dkozel@workstation build] ./litepcie_util info

11:15 <dkozel> FPGA identification: LiteX SoC on Aller 2020-04-28 16:49:57

11:15 <dkozel> [dkozel@workstation build] ./litepcie_util dma_test

11:15 <dkozel> DMA_SPEED(Gbps) TX_BUFFERS RX_BUFFERS DIFF ERRORS

11:15 <dkozel> 7.31 22432 22272 160 0

11:15 <dkozel> :D

11:15 <dkozel> Well that's a success

11:15 <dkozel> Going to try a hotswap now

11:17 <dkozel> Works

11:17 <dkozel> This is going to be very helpful

11:17 <dkozel> thanks daveshah

12:59 <futarisIRCcloud> dkozel: What are you using for 25G Ethernet?

13:06 <dkozel> A mellanox ConnectX-4 Lx

13:07 <dkozel> I really wanted 4x 10 GigE, but this is what was cheapest

13:12 <futarisIRCcloud> dkozel: https://www.tindie.com/products/clarahobbs/pd-buddy-wye/ is a USB 2.0 PD splitter. I don't think I've seen a USB 3.0 one.

17:07 <somlo> _florent_: something seems fishy in `copy_image_from_sdcard_to_ram()` right now -- it spensd only a fraction of a second "copying boot.bin to 0x80000000", then everything locks up when the system tries to jump there and run the payload

17:10 <somlo> probably the `f_read()` call sets `br` to 0 too soon, but I haven't actually checked yet

17:19 <_florent_> somlo: thanks, i indeed already add this behaviour and will investigate

17:19 <_florent_> somlo: are you testing with spisdcard or litesdcard?

17:25 <keesj> https://antmicro.com/blog/2019/12/testing-usb-cores-with-python-and-cocotb/

17:25 <tpb> Title: Antmicro · Testing open source USB IP cores with Python and Cocotb (at antmicro.com)

17:26 <keesj> I am currently trying to debug.. a usb verilog implementation of cdc ACM

17:27 <keesj> https://github.com/lawrie/tiny_usb_examples

17:27 <tpb> Title: GitHub - lawrie/tiny_usb_examples: Using the TinyFPGA BX USB code in user designs (at github.com)

17:29 <keesj> from reading they alreaded tested the tinyFPGA bootloader hence .. I expect.. a small problem (hello world is only displayed to the host when I reset the device)

18:02 <somlo> _florent_: with spi for now (didn't notice any recent commit indicating I should try sdcard again :) )

18:08 <somlo> ha, guess *now* it appears I should try sdcard again...

19:05 <_florent_> somlo: the issue you saw will still be there with the last commit, i still have to investigate. For the litesdcard code, i just did the FatFs wrappers, i will do more testing in the next days.

19:06 <ius> zyp: re: cle215 - if you loosen all heatsink screws you can unplug the fan connector (pull cable in a 90° angle away from the board), that solved most of the issues i had with it.. afterwards it runs at 71 °C with the litex bitstream for me

19:08 <zyp> I don't have a problem with the fan, I was just curious to check the exact part numbers

19:09 <ius> there's a video on youtube showing the plain die if that's what you're after (rest would be on the schematics, mostly)

19:36 <somlo> _florent_: built a sdcard bitstream on the nexys4ddr (with rocket) -- `sdcardboot` spits out similar data to the output of `sdinit`, twice or three times, then hangs

19:38 <somlo> (reverting to f972c8e4 allows me to load `boot.bin` successfully from sdcard and boot the kernel -- and IIRC that's the same gateware, only bios changes from that point to current master)

19:39 <somlo> for now, I'll just keep rebuilding and testing both spi and "regular" sdcard with nexys4ddr and rocket, each time I see fresh upstream commits