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<st-gourichon-fid>
Hi! Have a working litex/migen/etc environment. Trying to run a design with a RISC on a FOMU. I would be happy starting with *any* base design. But foboot seems tied to vexriscV. Can anyone help?
<st-gourichon-fid>
Hi! Have a working litex/migen/etc environment. Trying to run a design with a SERV (Serial Risc V) on a FOMU. I would be happy starting with *any* base design. But foboot seems tied to vexriscV. Can anyone help?
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<_florent_>
st-gourichon-fid: the easiest would probably be to start from the icebreaker target and use the USB-ACM UART (--uart-name=usb_acm)
<st-gourichon-fid>
_florent_, thanks, will look into that.
<st-gourichon-fid>
_florent_, my hardware is a FOMU. What makes icebreaker.py easier than starting with litex/litex-boards/litex_boards/targets/fomu.py ?
<_florent_>
st-gourichon-fid: because the actual Fomu target is a bit outdated i think and probably linked to foboot
<st-gourichon-fid>
_florent_, thanks
<_florent_>
i'm trying to create the target for fomu
<st-gourichon-fid>
Without your suggestion I would not have considered any other option that fomu.py since my hardware is fomu, for fear of creating incompatibilies. Thanks for the suggestion.
<tpb>
Title: CSR Bus · enjoy-digital/litex Wiki · GitHub (at github.com)
<mescobar>
If I had a application that manipulates the CSRs of a given peripheral, where would I put the application c-code in order to get cross compiled & included into the rootfs.cpio
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<somlo>
mescobar: by "rootfs.cpio", do you mean a linux initrd?
<somlo>
oh, nvm, he quit...
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