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<sajattack[m]>
has anyone tried building a litex design with openlane?
<sajattack[m]>
maybe I could try one of esdens simple socs
<sajattack[m]>
I just tried vexriscv_full and it was taking forever so now I'm trying vexriscv_min and maybe litex after that
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<sajattack[m]>
vexriscv_min looks good but I'm getting a negative hpwl error on the litex soc, whatever that means
<sajattack[m]>
I did kind of abuse it by removing the SB_IOs and SB_PLL, SB_SPRAM blocks
<sajattack[m]>
tried building the litex for another platform so it wouldn't have hard ice40 ip but it errored in the same way
<conmega>
Hrm lets see if I can get spi-sdcard added to the acorn over it's P2 I/O header. Wasn't having luck with serial loading, which I suspect to be a problem with my j-link clone and not a problem with the software.
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<conmega>
Well its loading the binaries in off SD card. (After finding out my 256MB microsd cards are not good and switching to a 32GB samsung card)
<conmega>
But after loading the linux image and files after the liftoff message it does nothing... so need to figure out what I am missing here
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<conmega>
Cool got the kernel loading now. Getting an early kernel panic though...
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<conmega>
Got linux booting on the Acorn :) Was able to use the prebuilt binaries for everything except the emulator.bin it wasn't starting timer0 and causing linux problems obviously. The one that got built with the acorn build worked though so I have to figure out what is different in the SoC build compared to the other platforms.
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