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<conmega>
I wish I had known about that presentation, I'd have loved to have seen it. Will have to keep a better eye out going forward :)
<somlo>
pdp7: any feel for whether the kernel folks would rather prefer 32-bit-only litex drivers, to be "64-bit-ified" later, or if width agnostic (32 *and* 64 bit support) should be added right from the start ?
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<pdp7>
unfortunately, that aspect was not covered. but I can follow up as all the participants like Jonathan Cameron are still around the virtual conference.
<pdp7>
conmega: it was really more of a discussion session to get some agreement on the right way to tackle problems. unfortunately, I didn't know it was accepted until about a week and half ago and thus wasn't able to get all the people that I think were necessary invovled
<pdp7>
the upside is at least several more experienced linux kernel developers are interested in what is going on with the LiteX drivers and CSR's
<conmega>
That's fair, I am really glad you started the discussion though! Really really happy to see this this type of discussion around this since I was looking into what it would be like to write some kernel drivers for additions to liteX
<pdp7>
but the lack of late registration and timezones kept some people from being able to particpation
<conmega>
Also I didn't realize microwatt was added to liteX, that's pretty neat. I work at IBM, on their Z mainframe hardware though, so not directly involved with P but its still awesome stuff.
<conmega>
Cool thanks for the link, I'll have to read through all that later.
<pdp7>
conmega: yeah, i would recommend you contact Benjamin Herrenschmidt who would have attended if it wasn't at 12am in australia
<tpb>
Title: Sign in - Google Accounts (at groups.google.com)
<pdp7>
hmm
<pdp7>
unfortunately linux-litex is a google group so sometimes links don't work right
<pdp7>
their address is Benjamin Herrenschmidt <benh@kernel.crashing.org>
<conmega>
Cool thanks!
<conmega>
I first need to look into some of the hardware development, I have been reading the PCIe base spec and scowering the litepcie and litex code-base to get a bit better of an understanding of how things are working.
<pdp7>
neat!
<conmega>
I'd like to add a root port to it so we can start playing with having a root port off riscV for Linux, for less than the 3 grand it cost previously for the sifive dev kit, although now with the 500 dollar icicle its probably less enticing
<conmega>
but ultimately it will be interesting as a learning experience and seeing where I can get with it
<conmega>
Looks like honestly the hardest part is just architecting it properly (ie sanely) following a similar implementation as the Xilinx AXI bridge would lend to leaning on their kernel driver code which is pretty simple
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<pdp7>
conmega: that is an interesting idea to have a PCIe root port.
<conmega>
seems like _florent_ was also interested in adding support for a root port as-well, I have an email I was writing up to send them but haven't gotten around to it.
<conmega>
I'd love to see it to give a wider access to people to do linux development for PCIe endpoint devices, it was really cool to see people get linux running on the sifive boards with a GUI and everything
<conmega>
but even simply playing with network controllers and stuff and verifying drivers and things work would be great
<conmega>
also having a root port for talking to things like NVMe storage and such could be useful for certain applications
<conmega>
it seems very popular to be hanging NVMe drives off FPGAs as of late, I believe even IBM has some open-source HDL for an NVMe drive attach to FPGA for special networking processing or something
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<benh>
I wish I could have attended ... but it was really not a good time for me, I've ended up skipping LPC completely