_florent_ changed the topic of #litex to: LiteX FPGA SoC builder and Cores / Github : https://github.com/enjoy-digital, https://github.com/litex-hub / Logs: https://freenode.irclog.whitequark.org/litex
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<conmega> Anyone happen to have experience using a jlink to do the bitstream load from the litex-boards project instead of the standard ft232? I don't happen to have an ft232 with the right pins broken out at the moment. I can get openocd seeing the xilinx part but it just fails a load.
<conmega> I always seem to butt heads with OpenOCD :/ Worst case here I'll just bring the output into Vivado and program that way or get a better FT232 breakout.
<mithro> Love to hear peoples ideas around https://twitter.com/mithro/status/1292189637566320640 -- the more different ways people can come up with the better
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<conmega> Ah nvm, figured out it was just keeling over on the --flash option, the --load option after changing the .cfg over to jlink works fine!
<conmega> hrm seems like for doing jtag_uart you want 500Khz for adapter speed or there about on a clone jlink
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