06:52 <KSmith> hey guys, I'm wondering if some one could guidance or some pointers, I'm attempting to generate the Linux binaries for Linux-On-Litex-VexRiscV following the instructions provided and using the defconfig but i keep getting the same error https://pastebin.com/mmXRazUr i checked that i have the mandatory packages for buildroot, the only one i couldn't

06:52 <KSmith> find info on was "which" which im currently trying to find more on, are there any other packages needed that i may have missed? or could this error be something else?

06:52 <tpb> Title: Buildroot Error - Pastebin.com (at pastebin.com)

07:37 <_florent_> KSmith: hi, it could be a regression of the build with newer versions of buildroot, can you try with commit of buildroot listed here: https://github.com/litex-hub/linux-on-litex-vexriscv/issues/152#issuecomment-696715308

16:13 <Krickit> hi everybody

16:15 <Krickit> i'm trying to do place and route for my versa ECP5 board but diamon return this error: ERROR - Unable to reach CIB within 1 routing segment for clock 'clk100_1' with driver 'clk100' at site 'P3/PL68C'

16:15 <Krickit> I used lpf file generated from tcl

16:16 <Krickit> someone can help me to solve?

16:16 <Krickit> litex with picorv32 soc

17:36 <powergraphic[m]> I'm trying to use the litescope without much success. I followed the wiki example to create an analyser script but I get an error 'RemoteClient' object has no attribute 'regs' https://github.com/enjoy-digital/litex/wiki/Use-LiteScope-To-Debug-A-SoC

17:57 <a314> Is liteX restricted to 32-bit buses or can it be used for much smaller-width wishbone buses as well? (i.e. 8-bit data, 16-bit addr)

21:19 <powergraphic[m]> I fixed my issue. You need to generate the csr CSV file using --csr-csv