thorns has quit [Quit: Ping timeout (120 seconds)]
thorns has joined #litex
thorns514 has joined #litex
thorns has quit [Client Quit]
FFY00_ has quit [Remote host closed the connection]
FFY00_ has joined #litex
Degi_ has joined #litex
Degi has quit [Ping timeout: 252 seconds]
Degi_ is now known as Degi
pftbest has quit [Remote host closed the connection]
pftbest has joined #litex
lambda has quit [*.net *.split]
Claude has quit [*.net *.split]
shoragan has quit [*.net *.split]
carlomaragno has quit [*.net *.split]
shoragan has joined #litex
carlomaragno has joined #litex
lambda has joined #litex
Claude has joined #litex
pftbest has quit [Ping timeout: 268 seconds]
dormito has quit [Ping timeout: 240 seconds]
thorns514 has quit [Quit: My MacBook has gone to sleep. ZZZzzz…]
Bertl_oO is now known as Bertl_zZ
pftbest has joined #litex
m4ssi has joined #litex
m4ssi has quit [Remote host closed the connection]
pftbest has quit [Remote host closed the connection]
pftbest has joined #litex
cr1901_modern1 has joined #litex
cr1901_modern has quit [Read error: Connection reset by peer]
pepijndevos has quit [Ping timeout: 246 seconds]
pepijndevos has joined #litex
pftbest has quit [Remote host closed the connection]
pftbest has joined #litex
pftbest has quit [Remote host closed the connection]
pftbest has joined #litex
thorns514 has joined #litex
cr1901_modern1 has quit [Quit: Leaving.]
cr1901_modern has joined #litex
<thorns514>
trying to integrate my systemverilog peripheral into LiteX - it seems to be trying to instruct yosys to `read_systemverilog` but this command does not seem to exist?
<thorns514>
(this one builds fine standalone in yosys trellis, just trying to figure out how litex is coming up with this yosys script command)
<thorns514>
I'll make an issue to fix this, I can make a PR once I get permission from work to contribute to this project
<thorns514>
https://github.com/enjoy-digital/litex/issues/870 FYI. Will make this a PR once I get permission, if someone hasn't just added the 6 lines themselves by then. Thanks to all for these amazing tools, so much fun.
<Melkhior>
@_florent_ Hello, I've added a framebuffer to my SoC, currently running 640x480@60Hz (for timing).
<Melkhior>
However, the display is corrupted and if I display a picture with 'fbv', everything goes to "south of heaven"
<Melkhior>
As far as I can tell by default nothing tells the kernel to not reuse the FB space for processes...
<Melkhior>
If I add a node in "reserved memory" that matches the 'reg' entry for the framebuffer node, then everything seems fine.
<Melkhior>
Did I forgot something and the entry should be there ? Or should the kernel figure out to not reuse the same memory ?
<Melkhior>
Or is it "normal" and the process has not yet been automated ?
<Melkhior>
TIA
thorns514 has quit [Quit: My MacBook has gone to sleep. ZZZzzz…]
thorns514 has joined #litex
kgugala has quit [Remote host closed the connection]
<Melkhior>
@_florent_ BTW, if the 'add a reserved_memory' entry is by chance the proper solution I have a patch to json2dts that automates the process
Bertl_zZ is now known as Bertl
kgugala has joined #litex
Bertl is now known as Bertl_oO
cjearls has joined #litex
<cjearls>
Hi, I've been using some LiteX designs, like the Linux-on-LiteX-Vexriscv, for a while, but I'm having some difficulty understanding how all the parts of litex come together or how I'd use litex to make a new design. I have an orangecrab FPGA board, and I'd like to use the microUSB port on the FPGA and some GPIO pins to act as a USB-to-UART adapter, but I'm not sure where to start. A lot of the pages that look like they'd be able to help in
<cjearls>
the documentation are still TODOs, so don't have any information yet
<cjearls>
As I learn more, I'd also be happy to help add documentation, but there are so many components and git repos and so much code that I'm having trouble finding a good starting point