_florent_ changed the topic of #litex to: LiteX FPGA SoC builder and Cores / Github : https://github.com/enjoy-digital, https://github.com/litex-hub / Logs: https://freenode.irclog.whitequark.org/litex
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<nickoe> _florent_: Do you know whats up with the netboot issue I wrote about just above?
<somlo> _florent_: I get an error building for nexys4ddr and trellis caused by this line: https://github.com/enjoy-digital/litex/blob/master/litex/soc/integration/soc.py#L1553
<somlo> the error is "AttributeError: 'SDCore' object has no attribute 'cmd_done'"
<somlo> something about the thing not being "self.cmd_done" in the SDCore, but not sure just adding that is the *right* fix :)
<_florent_> nickoe: Sorry, I've not been able to look at it yet
<_florent_> somlo: Ah, this is related to https://github.com/enjoy-digital/litesdcard/pull/25#issuecomment-823252640, the PR has probably not been updated
<_florent_> it should use: self.cmd_event.fields.done, would
<nickoe> _florent_: Ok, no worries, I will try to reproduce the issue with a new checkout and report it as an issue later.
<somlo> _florent_: thanks, that took care of it :)
<_florent_> somlo: have you measured the read/write speed in Linux with the last improvements? I haven't on my side but if you have numbers I'm interested :)
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<Melkhior> @_florent_ I'm not @somlo and I don't have numbers, but I can tell you it's very reliable for me and I believe noticeably faster than before - I'm running (too much) swap on the sdcard and it's yet to cause me any problem, and I'm making forward progress. For example at this time a C file os compiling while perl is trying to get stuuf from CPAN:
<Melkhior> Tasks: 80 total, 3 running, 77 sleeping, 0 stopped, 0 zombie
<Melkhior> %Cpu(s): 27.1 us, 5.8 sy, 24.6 ni, 42.5 id, 0.0 wa, 0.0 hi, 0.0 si, 0.0 st
<Melkhior> MiB Mem : 245.3 total, 3.3 free, 224.4 used, 17.6 buff/cache
<Melkhior> MiB Swap: 320.0 total, 160.9 free, 159.1 used. 14.3 avail Mem
<Melkhior>   PID USER PR NI VIRT RES %CPU %MEM TIME+ S COMMAND
<Melkhior> 15749 dolbeau 39 19 155.8m 108.9m 97.9 44.4 120:51.56 R /usr/rvbk/libexe+
<Melkhior> 17795 dolbeau 20 165.7m 86.4m 97.9 35.2 28:30.44 R /opt/local/bin/p+
<Melkhior> 17807 root 20 2.4m 1.4m 28.0 0.6 0:58.86 R top
<Melkhior>    53 root 0 -20 2.8 1:55.37 I [kworker/2:1H-mm+
<Melkhior> (/opt is NFS-mounted in this case)
<_florent_> Melkhior: great, your feedback is also very appreciated :)
<Melkhior> I like to push things to the limit:-)
<Melkhior> This is wasting 3MiB on reserved memory for the framebuffer, but last evening I was able to log on the FB console using my PS/2 keyboard and even use 'yaft' on it :-)
<Melkhior> Maybe the very first 'Desktop LiteX' ?
<Melkhior> Wish I had an old PS/2 mouse as well and a second PS/2 pmod, maybe I could try X11 with the fbdev driver...
<_florent_> Melkhior: hehe, nice!
<Melkhior> _florent_ a bit slow to be honest but fun nonetheless :-)
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<acathla> Can someone help me with the meaning of those lines : https://github.com/enjoy-digital/litex/blob/master/litex/soc/software/bios/linker.ld#L83
<acathla> I want to put all the code in RAM (it's executed from flash), but I still can see some strange addresses referenced in compiled code
<acathla> Oh, that's from zyp's last commit...
<acathla> I don't understand the difference between _fdata and _fdata_rom
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<somlo> _florent_: I'll run some tests later tonight; multi-block reading of 15MB is about 9 seconds now (down from 22)
<somlo> writes I still need to measure -- on a clean partition, since fragmentation will slow it down additionally
<leons> florent: I just got a chance to rebase on the timestamping changes in LiteEth
<leons> Unfortunately your changes on top of it seem to break it for me. In particular, the way I'm introducing a "return channel" FIFO where the event source is attached seems to be fundamentally incompatible with just having an EventSourcePulse triggered once per packet
<leons> This line in particular seems to just fill up the FIFO all the time, so when my driver tries to clear the FIFO it'll remain in an infinite loop
<leons> I think the reasonable approach might really be to change the event source logic from pulse to level whenever timestamping is enabled. This also makes events consistent with what's in the FIFO
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<nickoe> _florent_: Ok, I tested with the latest litex and I can reproduce the netboot issue, I created this bug
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<_florent_> leons: Indeed, I probably made a typo this should be done on END state, not IDLE
<_florent_> somlo: ok thanks.
<_florent_> nickoe: thanks for the issue, the steps to reproduce are well explained, I'm not able to look at it now, but will do soon
<_florent_> sajattack[m]: I fixed the flashing over PCIe on the Acorn, can you update LiteX-Boards and LitePCIe (make sure to use the latest driver) and do a test?
<_florent_> So if you want to update the bistream from PCIe, you can just do: ./litepcie_util flash_write your_bistream.bin
<sajattack[m]> <_florent_ "sajattack: I fixed the flashing "> I'll try on my lunch break
<_florent_> then ./litepcie_util flash_reload to reload the bitstream
<_florent_> and do a PCIe rescan or reboot the machine to be able to use the updated bitstream
<_florent_> with flash_read you can also dump it
<sajattack[m]> What was the issue out of curiosity?
<_florent_> The software/gateware was not in phase. I probably updated this from another project I have without really testing on hardware
<sajattack[m]> Ah
<leons> _florent_: okay, no worries. I thought so, IDLE seemed weird. Will send a patch!
<_florent_> leons: Thanks.
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<sajattack[m]> _florent_: on second thought, messing with hardware inside the computer I'm using for work on my lunch break doesn't seem like a good idea. I'll try later this evening (PST)
<sajattack[m]> * florent: on second thought, messing with hardware inside the computer I'm using for work on my lunch break doesn't seem like a good idea. I'll try later this evening (PT)
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<nickoe> sajattack[m]: What are you messing around with?
<sajattack[m]> pcie bitstream reloading on acorn cle-215+
<nickoe> hmm
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<sajattack[m]> basically making it so I can update my fpga from the computer it's in rather than needing another computer and an ftdi board