sb0 changed the topic of #m-labs to: ARTIQ, Migen, MiSoC, Mixxeo & other M-Labs projects :: fka #milkymist :: Logs http://irclog.whitequark.org/m-labs
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<GitHub21>
[artiq] sbourdeauducq commented on issue #769: Don't assume that if it fails timing on the buildbot it will also do so on your machine - Xilinx software is not that consistent. This bug also smells like the usual intermittent Xilinx breakage, we did not touch that part.... https://github.com/m-labs/artiq/issues/769#issuecomment-312465109
<GitHub12>
artiq/release-2 4e9165f whitequark: compiler: coerce `while` condition to bool....
<GitHub149>
[artiq] sbourdeauducq closed issue #766: clarifying how to configure IP and MAC addresses in doc/manual/installing.rst https://github.com/m-labs/artiq/issues/766
<GitHub137>
[smoltcp] batonius commented on issue #19: Added egress packet dispatching, the only thing I'm not sure about is the best way to determine if a TcpSocket is dirty. Right now I consider every TCP socket not in the CLOSED or LISTEN states as dirty, but limit the number of iterations over the dirty sockets list so we don't get an infinite loop. Overwise it appears to be working. https://git.io/vQ0Qg
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<travis-ci>
batonius/smoltcp#29 (packet_dispatch - c87e479 : Egor Karavaev): The build is still failing.
<GitHub7>
[smoltcp] batonius commented on issue #19: Fixed Travis builds. It looks like the `collections` crate has been merged into `alloc`, we should probably get rid of it too. https://git.io/vQEvu
<GitHub167>
[smoltcp] whitequark commented on issue #19: I'm in the middle of a fairly major refactoring of the TCP socket dispatch (it shouldn't impact your work much if at all), so I'll do a review once I finish that. https://git.io/vQEvA
<GitHub118>
[smoltcp] batonius commented on issue #19: Good. I'm gonna look into these tests for EthernetInterface, it's not as straightforward as I thought though. https://git.io/vQEJC