sb0_ changed the topic of #m-labs to: https://m-labs.hk :: Logs http://irclog.whitequark.org/m-labs
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<_florent_> sb0: the AD9154 has a SYNCOUT_n, here is a patch for a MultiReg on jsync: https://pastebin.com/exMU1T7C
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<jason1> rjo, sb0: from 2019-01-29: "<rjo> and can you ping other devices in the same (ip and vlan) network as the kc705? 21:50 <rjo> jason1_: a couple suggestions: make sure the router interface is gigabit. make sure the router interface is up. did you check the leds as requested yesterday? what were the results? do you see arp responses? did you check the uart as suggested yesterday? what were the results there? try connecting the rj45 cable
<jason1> I can ping kc705 now. Thanks!
<jason1> I went through process of upgrading my interface driver so that it could do 1Gbit. But as I read Sebastien later on it is not necessary. It worked with both speed settings.
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<sb0> _florent_: SYNCOUT is a differential signal, no?
<sb0> LVDS
<sb0> _florent_: with that patch the different links will see different SYNC. is that not a problem? also (but less importantly) duplicating MultiReg uses some resources for nothing.
<sb0> _florent_: i.e. sometimes, some links will begin ILAS one SYSREF period earlier than others. this sounds like a recipe for insufferable intermittent DAC initialization bugs.
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<_florent_> sb0: for SYNCOUT, i was just saying that the polarity is inverted internally, that's why you were suspecting an issue, but it's fine
<_florent_> sb0: you can mode the MultiReg in Core and pass it the to the LinkTX modules
<_florent_> sb0: but the potential issue with that is not a variation of one SYSREF but a Device cycle
<_florent_> sb0: i still don't explain with that the variation you see
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<_florent_> sb0: is DDMTD ensuring "Constant phase relatonship b/w TX & RX signals" (last figure of subclass1 chapter)
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