<kristianpaul>
so we have free of qemu test bench?
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<wpwrak>
mwalle: (PATCH 02/11) hmm, is this simply s/ram/mem/ ? is there anything magic about "ram" or "mem" ?
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<wpwrak>
(or is it just that you like "mem" better than "ram" ?)
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<mwalle>
wpwrak: the dp ram instance of lattice uses 'mem', and so does the initial code in lm32_cpu.v
<mwalle>
as its said in the commit message :b
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<wpwrak>
ah, so "mem" is a magic name ?
<wpwrak>
i.e., you couldn't call it, say, "foo"
<wpwrak>
just curious why you had to rename it for icarus, assuming it worked before (in non-icarus contexts)
<mwalle>
wpwrak: ah no, in the original code was some proprietary dp_ram instance (from lattice), that one was replaced by a generic lm32_dp_ram.v
<mwalle>
but then used the 'wrong' name
<mwalle>
the lm32_cpu.v access the signal directly with instance.name
<mwalle>
(this is only simulation related, so it doesnt affect the synthesis)
<mwalle>
of course you could rename the stuff in lm32_cpu.v, too
<mwalle>
kristianpaul: yeah theoretical you could use the whole qemu test bench
<Fallenou>
mwalle: thanks for the patches ! it's good to see patches flooding Milkymist ML :)
<Fallenou>
I've read them quickly and it seems fine but I will take time to read more carefully
<Fallenou>
good idea to separate dtlb code in other files
<Fallenou>
I started to separate the code in a special section at the bottom of the files ... but it's way better in a totally separate file :)
<mwalle>
Fallenou: hopefully, lekernel_ will merge these, so you can rebase/merge your mmu branch with the master
<mwalle>
all the patches i sent to the ML are only simulation specific, no tlb stuff (yet)
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<Fallenou>
00:05 < mwalle> all the patches i sent to the ML are only simulation specific, no tlb stuff (yet) < cool, looking forward to tlb related patches :)
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<Fallenou>
gn8!
<mwalle>
Fallenou: you can find them all in my github repository ;)