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<hackerfoo>
litghost: deps_verilog.py: error: argument inputfile: can't open '/home/dusty/src/symbiflow-arch-defs/library/tbassert.v': [Errno 2] No such file or directory: '/home/dusty/src/symbiflow-arch-defs/library/tbassert.v'
<tpb>
Title: [XC7] Some designs fail on hardware · Issue #491 · SymbiFlow/symbiflow-arch-defs · GitHub (at github.com)
<litghost>
mithro: Turns out kem_'s check pushed me in the right direction, but not in the way I expected
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<flow>
Hello, Does anyone know which arguments I have to pass to ecppack to generate an bit stream for loading in SPI Slave mode? If I enter no specific values and try to upload it following (the not very clear) instructions in the "ECP5 and ECP5-5G sysCONFIG Usage Guide" I keep getting CRC errors.
<daveshah>
I've never tried SPI slave mode
<daveshah>
Maybe it needs to be bit-reversed
<flow>
I think I can rule that out because as a check I tried sendin a bitstream with a wrong chipid in that case I get an "ID Error" while otherwise it is an CRC error
<daveshah>
I see
<daveshah>
Do you have a known-working bitstream from the vendor tools?
<daveshah>
Otherwise, perhaps try sending 7A (the bitstream burst command) 00 00 00 before sending the bitstream file itself
<flow>
I am just about to generate one with the official tool chain but have to set it up. Yes I tried that, without the 7A 00 00 00 I get an invalid comand response