00:31 <FelixVi2> cr1901_modern: Not sure if it's useful to you, but my fork lives here now

00:31 <FelixVi2> https://github.com/FelixVi/migen

02:21 <GitHub161> [artiq] jbqubit commented on issue #829: Tested using the following configuration... https://github.com/m-labs/artiq/issues/829#issuecomment-345411498

07:27 <GitHub122> [artiq] sbourdeauducq commented on issue #829: > artiq_influxdb produces asyncio error message.... https://github.com/m-labs/artiq/issues/829#issuecomment-345424584

07:32 <GitHub156> [artiq] sbourdeauducq commented on issue #829: Can you try the following patch and see if it fixes the problem? I don't have influx ready anymore. Test in particular the clean termination of ``artiq_influxdb``.... https://github.com/m-labs/artiq/issues/829#issuecomment-345424844

08:45 <GitHub68> [artiq] sbourdeauducq commented on issue #837: Problem is very apparent even just with ping:... https://github.com/m-labs/artiq/issues/837#issuecomment-345428234

11:37 <GitHub36> [sinara] gkasprow pushed 1 new commit to master: https://github.com/m-labs/sinara/commit/e7b41a2f00b06d95142f46bd89074e6a6459b28b

11:37 <GitHub36> sinara/master e7b41a2 Greg: fixed #362 fixed #363

16:58 <FelixVi> cr1901_modern: Do you want feedback on your blog post (migen-port)? I can send you a list of things I notice as I go through

17:03 <cr1901_modern> FelixVi: Sure, but I'm not gonna have time to update it for a while

17:11 <GitHub167> [artiq] enjoy-digital pushed 5 new commits to master: https://github.com/m-labs/artiq/compare/aff1609a5349...cd83b71d92fd

17:11 <GitHub167> artiq/master f003566 Florent Kermarrec: serwb: fix rx_delay_inc on ultrascale, this was the issue serwb issue......

17:11 <GitHub167> artiq/master 1b976bf Florent Kermarrec: gateware/serwb/kusphy: use AsyncResetSynchronizer on cd_serwb_serdes_5x

17:11 <GitHub167> artiq/master 39a8fc6 Florent Kermarrec: artiq/firmware/libboard/hmc830_7043.rs: some cleanup, don't use hmc830 for now

17:11 <_florent_> sb0: ok it's working, a stupid thing on rx delay incrementing...

17:12 <_florent_> sb0: things still to be done

17:12 <_florent_> sb0, rjo: can one of you fix this: https://github.com/m-labs/artiq/blob/master/artiq/gateware/targets/sayma_amc_standalone.py#L101

17:14 <_florent_> sb0, rjo: for ad9154.rs, i don't wanted to break design on kc705, so the correct ad9154.rs is here: https://github.com/enjoy-digital/artiq/blob/master/artiq/firmware/libboard/ad9154.rs

17:15 <_florent_> sb0, rjo: i'm still not able to get hmc830 working correctly, i would like help on that. I don't know if it's something broken on my board or the configuration

17:16 <_florent_> sb0, rjo: to test with hmc830, just:

17:16 <_florent_> https://github.com/enjoy-digital/artiq/blob/master/artiq/firmware/libboard/hmc830_7043.rs#L25 : set it to 1

17:16 <_florent_> uncomment here: https://github.com/enjoy-digital/artiq/blob/master/artiq/firmware/libboard/hmc830_7043.rs#L183

17:17 <_florent_> sb0, whitequark: feel free to cleanup rust code if it's dirty, that was the first time i was using rust and just hack things to get it workign

17:18 <_florent_> sb0: finally, have you got ethernet working?

17:33 <FelixVi> cr1901_modern: https://pastebin.com/tpC6M4K6

17:34 <FelixVi> I'll play with it today and will see if there's anything else that comes up ;)

17:37 <cr1901_modern> FelixVi: I... go over connectors?

17:38 <FelixVi> cr1901_modern: not as in review the whole subject

17:38 <FelixVi> but maybe show how to use connector pins for testing

17:39 <bb-m-labs> build #890 of artiq-board is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/890

17:41 <cr1901_modern> FelixVi: What's wrong with my PMOD example?

17:42 <cr1901_modern> I assume a person can extrapolate to use it for testing. But I'll add a sentence for it

17:42 <bb-m-labs> build #1776 of artiq is complete: Failure [failed] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/1776 blamelist: Florent Kermarrec <florent@enjoy-digital.fr>

17:42 <FelixVi> I'm having a little bit of trouble

17:43 <FelixVi> does subsignal support "id" just like an I/O tuple does?

17:44 <FelixVi> what I'm trying to do is use 5 connector pins basically the same way you use "user_led"

17:44 <FelixVi> Overall, take this with a grain of salt as I have no migen experience - but that's what is assumed

17:45 <cr1901_modern> "The inputs to a Subsignal constructor are identical to an I/O tuple entry, except with id omitted"

17:45 <cr1901_modern> I put that in the post

17:47 <cr1901_modern> Now what I could've done better is something like this:

17:47 <cr1901_modern> ("user_led", 0, Pins("PMOD:0 PMOD:1 PMOD:2 PMOD:3 PMOD:4"), IOStandard("LVCMOS33"))

17:47 <FelixVi> ah, yeah that makes much more sense to me

17:47 <cr1901_modern> I'm not done

17:47 <cr1901_modern> This creates a user_led signal with 5 elements when you do plat.add_extension()/plat.request("user_led")

17:48 <cr1901_modern> h/o

17:50 <cr1901_modern> [("user_led", 0, Pins("PMOD:0"), IOStandard("LVCMOS33")),

17:50 <cr1901_modern> ("user_led", 3, Pins("PMOD:3"), IOStandard("LVCMOS33")),

17:50 <cr1901_modern> ("user_led", 1, Pins("PMOD:1"), IOStandard("LVCMOS33")),

17:50 <cr1901_modern> ("user_led", 2, Pins("PMOD:2"), IOStandard("LVCMOS33")),

17:50 <cr1901_modern> ("user_led", 4, Pins("PMOD:4"), IOStandard("LVCMOS33")),]

17:51 <cr1901_modern> This allows you to plat.request("user_led") 5 times.

17:51 <cr1901_modern> Each value returned is a 1 bit signal representing an LED

17:58 <FelixVi> cr1901_modern: Thanks! I'll give that a shot

17:59 <FelixVi> I just brought up misoc and migen on another machine and so far things seem to work out

23:51 <FelixVi> cr1901_modern: any idea why the rot example may not produce a xst file?

23:53 <FelixVi> i can't see what's going on with the icestick example as I don't have the toolchain

23:54 <FelixVi> It sounds like there's more path-related issues, though