#linux-sunxi on 2015-11-02 — irc logs at freenode.irclog.whitequark.org

2015-02-18 19:37 Turl changed the topic of #linux-sunxi to: Allwinner/sunxi /development discussion - did you try looking at our wiki? https://linux-sunxi.org - Don't ask to ask. Just ask and wait! - https://github.com/linux-sunxi/ - Logs at http://irclog.whitequark.org/linux-sunxi

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07:54 <HAMIDx9> hi, anyone aware of AW5306 driver for mainline kernel ?

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08:38 <BroderTuck> which comment about the h3 pll6 is correct, https://groups.google.com/d/msg/linux-sunxi/BBl8dCvHlj8/O8hnbY0icgwJ or https://groups.google.com/d/msg/linux-sunxi/XYSGx4k8nIE/GntvSN8oAQAJ ?

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10:09 <mripard> jemk: I'm sorry, I'm currently travelling and stuck by the fog in london

10:09 <mripard> so I haven't had the time to participate to the discussion as I should have

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11:36 <rellla> nove: ping

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12:25 <faisal> Hi there

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13:41 <montjoie> hello does someone know if vishnup released his uboot patch for A83T ?

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15:10 <mstar> I experiment with jwrgoede/u-boot-sunxi wip branch on A20 to get mainline u-boot to boot from nand (MLC). I compiled the latest WIP from GIT and boot the u-boot from SD. The nand is found and I can read/write/dump the nand fine. However I was not able to figure out what to place where in NAND to make the u-boot boot from it. Do i need to keep original boot0 and maybe multiple copies of u-boot? Any indication how it is supposed to work in futur

15:10 <mstar> e would be really appreciated.

15:15 <plaes> mstar: could you try this: http://lists.denx.de/pipermail/u-boot/2015-May/214959.html

15:18 <plaes> though, I'm not sure whether it works with MLC

15:20 <mstar> @plaes: thanks for the pointer. looks like I need to get the complete linux to work as well. Not so easy since my board (Marsboard A20) is not having a device tree source and I manually have to patch it together.

15:21 <mstar> So it looks like the magic to layout the boot partition is already in mtd0 handler in linux wip branch?

15:21 <plaes> probably

15:21 <mstar> thanks, will try that

15:23 <plaes> be aware that when you run new kernel with mtd driver, it will format nand and kill android/3.4 layout

15:24 <mstar> thanks for the heads up. Since I want to have a clean debian booting from nand I have no feelings scrubbing the entire chip ;-)

15:24 <plaes> that's the spirit! :D

15:25 <plaes> besides, now that there's WIP kms, future seems quite bright :)

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18:32 <szsoftware> Hi there and good evening!

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18:33 <szsoftware> Pi Plus - What is necessary to use another uart port than (debug) uart0

18:34 <szsoftware> I expected to measure ~ 3.3 V on Pin 6,7 (5 GND) or 22,23 (24 GND)

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18:36 <szsoftware> Want to connect to a 3V3 TTL UART on another embedded device and connect e.g. with "screen /dev/ttyS1"

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18:37 <szsoftware> Want to connect to a 3V3 TTL UART on another embedded device and connect e.g. with "screen /dev/ttyS2" on pi plus via ssh session to remote debug the other embedded device

18:39 <szsoftware> Actually I measure on one port only 3V on one of RX/TX lines on the other (UART3) 0V

18:40 <szsoftware> Kernel tells me:

18:40 <szsoftware> [ 0.000000] Kernel command line: earlyprintk=ttyS0,115200 loglevel=8 initcall_debug=0 console=ttyS0,115200 console=tty0 init=/init

18:40 <szsoftware> [ 0.000000] console [tty0] enabled, bootconsole disabled

18:40 <szsoftware> [ 0.589710] uart0: ttyS0 at MMIO 0x1c28000 (irq = 32) is a SUNXI

18:40 <szsoftware> [ 0.781989] console [ttyS0] enabled

18:40 <szsoftware> [ 1.217785] uart2: ttyS2 at MMIO 0x1c28800 (irq = 34) is a SUNXI

18:40 <szsoftware> [ 1.381577] uart3: ttyS3 at MMIO 0x1c28c00 (irq = 35) is a SUNXI

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18:48 <szsoftware> Sorry, some pin confusion: UART3 is on EXT Port Pin 6 (GND), 8 (TX), 10 (RX). Just for larification, that I measure at the right pins.

18:49 <szsoftware> UART2: 9,11,13

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22:47 <Polonium> hi all

22:48 <Polonium> can i ask a small help ?:P

22:51 <Polonium> i try to complie a kernel

22:52 <Polonium> first i have an a13 tablet

22:53 <Polonium> i try to make an own kernel

22:53 <Polonium> but when i try i have no screen

22:53 <Polonium> [ 0.000000] Booting Linux on physical CPU 0

22:53 <Polonium> [ 0.000000] Initializing cgroup subsys cpuset

22:53 <Polonium> [ 0.000000] Linux version 3.4.103+ (testa@asusGrey) (gcc version 4.8.4 20141219 (release) (4.8.4-1+11-1) ) #11 PREEMPT Mon Nov 2 22:37:07 GMT 2015

22:53 <Polonium> [ 0.000000] CPU: ARMv7 Processor [413fc082] revision 2 (ARMv7), cr=10c5387d

22:53 <Polonium> [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache

22:54 <Polonium> [ 0.000000] Machine: sun5i

22:54 <Polonium> [ 0.000000] Memory Reserved:

22:54 <Polonium> [ 0.000000] SYS : 0x43000000 - 0x4300ffff ( 64 kB)

22:54 <Polonium> [ 0.000000] VE : 0x44000000 - 0x48ffffff ( 80 MB)

22:54 <Polonium> but the original ubuntu kernel hae this

22:54 <Polonium> [ 0.000000] LCD : 0x49000000 - 0x4affffff ( 32 MB)

22:54 <Polonium> [ 0.000000] Initializing cgroup subsys cpuset

22:54 <Polonium> [ 0.000000] Linux version 3.0.62+ (root@bob) (gcc version 4.6.3 (Ubuntu/Linaro 4.6.3-1ubuntu5) ) #40 PREEMPT Mon Apr 1 22:20:19 CEST 2013

22:55 <Polonium> [ 0.000000] CPU: ARMv7 Processor [413fc082] revision 2 (ARMv7), cr=10c5387d

22:55 <Polonium> [ 0.000000] CPU: VIPT nonaliasing data cache, VIPT aliasing instruction cache

22:55 <Polonium> [ 0.000000] Machine: sun5i

22:55 <Polonium> [ 0.000000] Memory cut off:

22:55 <Polonium> [ 0.000000] MALI : 0x5c000000 - 0x5fffffff ( 64 MB)

22:55 <Polonium> [ 0.000000] Ignoring unrecognised tag 0x00000000

22:55 <Polonium> [ 0.000000] Memory Reserved:

22:55 <Polonium> [ 0.000000] SYS : 0x43000000 - 0x4300ffff ( 64 kB)

22:55 <Polonium> [ 0.000000] VE : 0x44000000 - 0x48ffffff ( 80 MB)

22:55 <Polonium> [ 0.000000] LCD : 0x5a000000 - 0x5bffffff ( 32 MB )

22:55 <Polonium> So i have a missing line the mali 400 memory

22:55 <Polonium> what i miss ?

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23:00 <Polonium> i offer 100 poun if somebody can help :P

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23:39 <adj_> Polonium, what kernel source are you compiling?

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