Turl changed the topic of #linux-sunxi to: Allwinner/sunxi /development discussion - did you try looking at our wiki? https://linux-sunxi.org - Don't ask to ask. Just ask and wait! - https://github.com/linux-sunxi/ - Logs at http://irclog.whitequark.org/linux-sunxi
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<Turl> fl_0: what tree are you using?
<Turl> fl_0: you may want to check this patch https://lkml.org/lkml/2015/11/5/91
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<TheLinuxBug> on those old Arm9 boards is there some auto kill that happens if something uses too much cpu time?
<TheLinuxBug> hrmm
<TheLinuxBug> baffled by why this thing keeps freezing up on some commands
<TheLinuxBug> the whole session will stop
<TheLinuxBug> for exampl, type dmesg
<TheLinuxBug> I get first few line, freeze
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<wens> montjoie: running rngtest on my cb2
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<wens> the orange pi pc is cheap to the point of using the integrated phy, wonder what limitations there are
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<wens> mripard: i'd like to change the prcm driver to use simple-mfd, starting with the new socs
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<wens> rngtest: bits received from input: 2441280032
<wens> rngtest: FIPS 140-2 successes: 121960
<wens> rngtest: FIPS 140-2 failures: 104
<wens> montjoie: ^
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<mripard> wens: do we even need simple-mfd then ?
<mripard> wens: we don't have to represent all nodes under a node
<mripard> and if we don't need that node, we don't need simple-mfd
<wens> mripard: yeah, that is actually what I want :)
<wens> the old smp code for existing socs need a mapping to the prcm address space though, but we can remove them since we have psci
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<montjoie> fl_0: the link given by Turl is good for solving this issue
<montjoie> wens: thanks for testing, could you test it on non-A20 board ?
<montjoie> igraltist: could you paste the fail ?
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<wens> montjoie: a33 maybe? your webpage says a10 is not supported?
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<montjoie> in fact A10 is supported, but I got errors on it
<montjoie> I will resentence the line on the site
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<fl_0> montjoie: good morning.
<fl_0> I will try that patch
<fl_0> on a banana pi r1 by the way
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<wens> [ 1.186592] sun4i-ss 1c15000.crypto-engine: Die ID 5
<wens> [ 1.187574] alg: hash: Test 1 failed for sha1-sun4i-ss
<wens> [ 1.187583] 00000000: ee a3 39 da 0d 4b 6b 5e ef bf 55 32 90 18 60 95
<wens> [ 1.187586] 00000010: 09 07 d8 af
<wens> [ 1.189729] sun4i-ss 1c15000.crypto-engine: ERROR: hwrng end timeout 30>30 ctl=50051
<wens> montjoie: A33 doesn't look good ^
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<montjoie> same error than A10, but strange you got also an error on sha1
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<wens> [ 1.437141] sun4i-ss 1c15000.crypto-engine: Die ID 4
<wens> [ 1.450748] sun4i-ss 1c15000.crypto-engine: ERROR: hwrng end timeout 30>30 ctl=40051
<wens> A31 ^
<wens> fyi these are messages from probe time, i haven't run any tests
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<montjoie> I will recheck datasheet for hwrng
<montjoie> but last time all was totally the same
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<montjoie> wens: does you have always those sha1 error on probe ?
<wens> you mean if i remove the prng patch?
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<wens> [ 1.183949] sun4i-ss 1c15000.crypto-engine: Die ID 5
<wens> [ 1.184955] alg: hash: Test 1 failed for sha1-sun4i-ss
<wens> [ 1.184963] 00000000: ee a3 39 da 0d 4b 6b 5e ef bf 55 32 90 18 60 95
<wens> [ 1.184967] 00000010: 09 07 d8 af
<montjoie> logicay the prng is unrelated with those error
<wens> still fails, without the prng patch
<wens> I don't have old kernel images or boot logs around, so I can't really say
<montjoie> I was thinking to a sort of clock probleme, but the requirement are the same between A31 and A20
<fl_0> montjoie: I can confirm that the driver loads perfectly now
<fl_0> with the patch u mentioned
<fl_0> Will test openssl speeds now
<montjoie> wens: and same for A31
<wens> fyi the ss clock is at 150 MHz, and ahb_ss is at 84 MHz on my A33
<montjoie> the datasheet require < 24
<montjoie> oups > 24
<montjoie> but perhaps 84 is too much
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<wens> ahb and ss both at 150 MHz on A31 and A20
<montjoie> or perhaps underclocked ?:)
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<wens> we don't have code to reparent ahb clock on sun8i yet
<montjoie> wens I dont remember how to see those numbers, could you give the patch to the debugfs ?
<wens> cat /sys/kernel/debug/clk/clk_summary
<montjoie> thanks
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<montjoie> could you test to put ahb_ss to 150 on any failing board ?
<rellla> wens: may i publish your ve-clocks branch? maybe some volunteer is waiting for it ...
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<wens> montjoie: that requires some uboot modifications :|
<wens> rellla: i haven't fixed the reset-cells issue yet
<rellla> ok.
<wens> montjoie: and the a31 already has ahb_ss at 150, prng failing
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<montjoie> my major fear is the sha1 error
<rellla> oliv3r_: i doubt, that allwinner will add anything more...
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<T0mW> mripard: I figured out my problem with the device tree + spi, working great now.
<T0mW> mripard: I didn't understand that spidev was a protocol driver, I was making my devices children of that thinking it was the spi interface itself, doh.
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<wens> nice to see Olimex is doing A33 and H3 prototypes
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<plaes> wens: and they're slowly moving to KiCAD
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