15:20 <somlo> _florent_: My first pass at documenting LiteX CSRs: https://github.com/enjoy-digital/litex/issues/314

15:20 <tpb> Title: We need to document LiteX CSRs! · Issue #314 · enjoy-digital/litex · GitHub (at github.com)

15:22 <somlo> a few of the things I'm still not 100% clear about (including the intra-subregister endianness) shown as "FIXME", hope github will let us edit each others' comments, but if not, I'm happy to edit it myself until it's ready for being turned into a PR :)

15:57 <_florent_> somlo: thanks! (sorry i still have to look at your results from yesterday)

16:03 <somlo> _florent_: no worries, whenever you get a chance. When you do, I'll work your response into the new CSR.md candidate (it's one of the FIXMEs in there now) :)

20:53 <dkozel> Hello folks. I'm looking around to see if anyone has already written board support files for the Aller Artix-7 card?

20:54 <dkozel> One is on its way to me soon and I'm hoping to get litepcie and litedram running before the GNU Radio hackfest at the end of January

20:56 <dkozel> I'll open a PR with one if it hasn't been done before.

21:19 <kc8apf> I've been working on a platform definition for PicoEVB which is very similar. Litepcie and litedram should just work once you have a platform defining the top level I/O connections

21:59 <_florent_> dkozel: https://github.com/litex-hub/litex-boards/blob/master/litex_boards/partner/platforms/aller.py

21:59 <tpb> Title: litex-boards/aller.py at master · litex-hub/litex-boards · GitHub (at github.com)

21:59 <_florent_> https://github.com/litex-hub/litex-boards/blob/master/litex_boards/partner/targets/aller.py

21:59 <tpb> Title: litex-boards/aller.py at master · litex-hub/litex-boards · GitHub (at github.com)

22:00 <_florent_> dkozel: i know Rohit tested LiteDRAM/LitePCIe with it

22:20 <dkozel> ah! I was looking in different repos than that!

22:20 <dkozel> Thanks _florent_