<kristianpaul> wolfspraul: got your rca male-male cable, good !
<kristianpaul> lekernel: for the disable video-in  is not just enought to comment define ENABLE_VIDEOIN at setup.v?
<kristianpaul> ah well in boards/gen_capabilities.v i just see
<kristianpaul> `ifdef ENABLE_VIDEOIN
<kristianpaul> assign videoin = 1'b1;
<kristianpaul> `else
<kristianpaul> assign videoin = 1'b0;
<kristianpaul> `endif
<kristianpaul> hmm
<kristianpaul> and a PULLDOWN
<wolfspraul> pulldown?
<kristianpaul> hmm but reading more deeper i just may aply to 3-state nest..
<kristianpaul> nets*
<kristianpaul> ah, wait may be pulldown as a library
<kristianpaul> ergg, but we need ground it.. lets wait better a sebastien answer ;-)
<lekernel> kristianpaul: we are talking about the video _out_
<kristianpaul> ahhh !!
<kristianpaul> but reply somthing about modifying the verilog code..
<kristianpaul> okay this is physical  not logical then, sorry for the confusion !
<lekernel> can't see what you mean. we want to set the voltage to 0 on all video out signals to the adc
<lekernel> there are many ways to do that, but the simplest one is to assign 0 in the verilog source
<kristianpaul> okay so input is not relevant, that was my confution
<kristianpaul> nv my silly questions ;-)
<rejon> milkymist fucking rules!
<rejon> plugged into my parents flat screen totally cool ambient experience
<Fallenou> :))
<lekernel> :)
<lekernel> did you try with the video input too
<lekernel> ?
<rejon> lekernel not yet
<rejon> what type of camera to use for that?
<rejon> usb will work?
<lekernel> no, composite
<rejon> ok, i don't have a composite camera
<rejon> need to pick one up
<lekernel> look for cctv ones :)
<lekernel> if you want cheap
<rejon> i'll get one in china
<rejon> next week
<lekernel> phew. how many times are you on the plane a month? :)
<Fallenou> in a little bit more than 2 hours we will know if Milkymist is accepted as a GSoC org :)
<Fallenou> it seems they just made their first 28 nm fpga at Xilinx
<Fallenou> they are testing it right now
<lekernel> I wonder where the timing models in ise 13.1 come from
<lekernel> if they did not measure timing, how do they know about it? model a 28nm model?
<Fallenou> ahah don't know
<Fallenou> you mean they already had the timing information of the 7 series 28nm in ISE ?
<lekernel> yes
<Fallenou> before having made the chip ?
<Fallenou> ahah nice
<lekernel> maybe
<lekernel> don't know
<Fallenou> I am looking at the same exact video, but from altera side :p
<Fallenou> it's like a youtube battle
<lekernel> less than 300 views so far
<lekernel> even milkymist videos are more popular
<Fallenou> "look I'm at 10 Gb/s and the eye is wide open !!"
<Fallenou> for altera 28nm chip
<Fallenou> oh
<lekernel> I most probably won't go, but it could be a nice place to learn about EDA/ASICs
<lekernel> if you manage to get through the ivory tower's "authorized persons only" scanner
<Fallenou> =)
<Fallenou> :)
<lekernel> actually I emailed them about the registration details and fees, and the answer said "details are to be published later" (which they didn't) and that I had to note that such events were solely for "authorized persons"
<lekernel> maybe just gatecrash
<lekernel> sometimes it's surprisingly easy
<Fallenou> to get access what do you basically need ?
<Fallenou> to pay ?
<Fallenou> to be from specific company?
<lekernel> no idea :)
<Fallenou> hum hum
<Fallenou> it smells bad when nothing is explained :)
<lekernel> pay synopsys licenses I guess
<Fallenou> as if they wanted to advertise about it
<Fallenou> but didn't want anyone to come
<lekernel> that's how the asic business is
<lekernel> very small world
<Fallenou> or at least not someone not invited through some private channel
<lekernel> very closed
<lekernel> I'm not really surprised to see such behaviour
<lekernel> and I wouldn't be surprised either if they had little security at the entrance
<lekernel> even if there's a $3000 entrance fee
<Fallenou> =)
<Fallenou> anyway I won't be in London anymore in May
<lekernel> usually this is paid for by rich companies who send their employees, and they don't really take into account curious individuals trying to get it
<lekernel> (asic placement algorithm)
<Fallenou> But I guess you can't use it
<Fallenou> right ?
<scrts> if its patented, then.. :)
<Fallenou> =(
<larsc> well, of course you can use it. just pay the patent fee ;)
<lekernel> software (i'd even say math) isn't patentable in europe
<lekernel> if people want to argue about that or to find ways around the patent's claims, they feel free, but I won't spend a split second on that
<lekernel> anyway, the first versions of my placer will use simulated annealing. that's for later.
<Fallenou> lekernel: after llhdl and antares, I guess you will need a bitgen clone, is it difficult to do ?
<lekernel> moderately
<lekernel> it'll probably be built into the antares tools anyway... it's simpler than re-reading XDL files
<lekernel> kristianpaul: looks interesting that labsurlab
<kristianpaul> lekernel: yeah it is :-)
<kristianpaul> lekernel: i'l aleready spare a talk with dorkbot people about milkymist too
<kristianpaul> already*
<lekernel> :)
<lekernel> "uso y abuso de un satelite militar yankee"
<lekernel> lol
<kristianpaul> ;-))
<lekernel> at least you're doing it properly, I've heard (but I don't know if it's true) that some people simply hook a varactor doubler to a hamradio TX
<lekernel> this sounds like a lot of EM pollution
<lekernel> without proper filtering...
<kristianpaul> (hook a varactor doubler to a hamradio TX) oh yes, its true !
<kristianpaul> There are lots of cases, one intentionals others not so, radio is really fun
<lekernel> and what do you use for receiving?
<lekernel> I mean, the "poor man's" solution like that one for TX :-)
<kristianpaul> I dont know really, i just was told about what you pointed, but i bet another cheap radio and hackish atena will do the job.
<kristianpaul> I can tell more about this after the labsurlab ;)
<Fallenou> lekernel: seems we're not in gsoc this year again :x
<kristianpaul> Why??
<rejon> suck!
<rejon> i just saw
<rejon> aiki got turned down too
<rejon> man!
<rejon> i tried harder than normal
<rejon> they have a lots of legacy projects they support now
<rejon> fine, well, at least google giving money
<rejon> that was the last time i will try gsoc for any project
<kristianpaul> (legacy projects they support now)
<rejon> i would rather have $$$ anyway
<Fallenou> enlightenment was refused too
<kristianpaul> not sound well
<kristianpaul> what?
<Fallenou> dokuwiki got accepted ...
<kristianpaul> :-(
<Fallenou> wordpress too
<rejon> yeah, well, they paid fabricatorz today though
<rejon> which is good
<rejon> :)
<rejon> my company they paid 4 months late
<lekernel> as usual I guess they gave you no reason for rejection?
<rejon> lekernel right
<rejon> actually its good
<rejon> i just emailed the list
<kristianpaul> 5000usd ! great :-)
<kristianpaul> dint knew it about rejon company
<rejon> http://fabricatorz.com and aikilab
<rejon> and of course sharism.cc
<rejon> and sharism.org
<kristianpaul> and you the sharism guy ! nice to met you some day :-)
<rejon> sure
<rejon> kristianpaul where you live?
<kristianpaul> rejon: Buga, Colombia
<kristianpaul> some far :-)
<rejon> cool
<kristianpaul> Fallenou: rtems got in gsoc?
<Fallenou> yep
<kristianpaul> kanzure_: hi, do you have something new to tell about organic semiconductors? :-)
<Fallenou> oh I didn't know about this project
<Fallenou> nice !
<kristianpaul> I wonder if i bought i dual/quad cored cheap cpu sintesis speed will improve a bit..
<kristianpaul> 45 minutes waiting to confirm a _single_ change is PAIN
<Fallenou> yes it is :(
<kristianpaul> I bet that what more  encorage sebastien for start llhdl ;-)
<Fallenou> AFAIK the synthesis process is purely mono threaded
<kristianpaul> argh!
<Fallenou> so you would not gain anything with N cores
<Fallenou> Xst and all the toolchain uses only one core :(
<kristianpaul> -_-
<Fallenou> but the more you add cores the more you can do things in parallel without slowing down the synthesis :)
<kristianpaul> hahag
<kristianpaul> s/g/h
<kristianpaul> nah
<kristianpaul> i may add ram later for some experiments
<kristianpaul> i'm happy with my single core
<Fallenou> it could be great to have several server to do synthesis on them
<Fallenou> you could test several changes at the same time
<Fallenou> if you have like a 8 cores machine
<Fallenou> you can put 8 virtual machines
<kristianpaul> ah, servers..
<Fallenou> and do 8 synthesis in parallel
<kristianpaul> wpwrak: tuxrandon have some GUI isnt? and VNC? i remenber
<Fallenou> or just with some cp trick and without any virtualmachine :p
<kristianpaul> no man two sintesis threas and my computer will burnout..
<Fallenou> yes I meant on a server
<Fallenou> with several cores :)
<kristianpaul> :-)
<Fallenou> and proper fans / heat sinks
<Fallenou> it still won't improve the synthesis time
<Fallenou> but can make it possible to test several changes in less time
<wpwrak> kristianpaul: tuxrandon ? qu'est-ce que c'est ?
<Fallenou> wpwrak: il ne parle pas francais je pense
<wpwrak> Fallenou: i think it's the universal symbol of puzzledness ;-)
<kristianpaul> wpwrak: je ne parle francais
<Fallenou> wpwrak: just say "wtfff ?"
<Fallenou> it's more universal :p
<kristianpaul> wpwrak: turandot, sorry typo
<kristianpaul> ah no
<kristianpaul> no
<kristianpaul> wpwrak: fidelio !
<wpwrak> Fallenou: also very good to convey early to students the complexity they'll face in the coming years :)
<Fallenou> the complexity of what ?
<kristianpaul> life?
<kristianpaul> physics?
<kristianpaul> :p
<kristianpaul> s/software/gas
<wpwrak> turandot sounds dangerous. "While working on Turandot, Puccini grew ill and died [...]"
<kristianpaul> hahaha
<wpwrak> Fallenou: the french language
<kristianpaul> wpwrak: (french) but you speak spanish, the swich is not so _big_
<Fallenou> I don't get it , is kristianpaul coming to study in france ?
<kristianpaul> lol
<kristianpaul> Not that i'm aware off  ;-)
<Fallenou> ok :p
<Fallenou> kristianpaul: a few minutes ago 4 spanish-or-assimilated guys just started following me on twitter
<Fallenou> I guess it comes from you :p
<kristianpaul> oh yes?
<wpwrak> Fallenou: naw, don't you know the old song "psycho killer" (or the parody "psycho chicken") ? there, they also use "qu'est-ce que c'est" as a term of puzzlement in an otherwise english text
<Fallenou> like "truequedigital" or "cartograsonoras"
<kristianpaul> i dont know use twitter, just mirror microblof from identi.ca
<Fallenou> oh no sorry wpwrak :) didn't know !
<Fallenou> ok :p
<kristianpaul> let me confirm thats not spam
<Fallenou> there is miqrorelatos too
<Fallenou> and camkiant
<Fallenou> camikant
<Fallenou> wpwrak: thanks :)
<kristianpaul> ah yes, trusty near related people
<kristianpaul> may be from labsurlab i think
<kristianpaul> yes
<Fallenou> it's right after i retweeted something from you
<Fallenou> about your labsurlab stuff in fact :)
<Fallenou> kristianpaul: is there going to be a milkymist show/presentation somewhere ?
<kristianpaul> phew, almost finishing a better diagram for milkymist SoC, now do it in dia :p
<Fallenou> at labsurlab ?
<Fallenou> oh a new soc block diagram ? :) cool !
<kristianpaul> (at labsurlab) not yet, it begin at april 4
<kristianpaul> conbus 2x5:  mico32 <-> slaves (NOR, ROM, CSR, FML)
<kristianpaul> and i gues in the that order arbitrer take cares..
<scrts> hm
<kristianpaul> (NOR, ROM, YSB, CSR, FML)**
<kristianpaul> s/YSB/USB
<scrts> are there any plans of streaming video through lan? :)
<kristianpaul> scrts: i think that pushing data to lan is the only think ethernet drivr do best
<kristianpaul> (note not makinf resposible Fallenou for this)
<CIA-37> antares: Sebastien Bourdeauducq master * rb27b033 / (3 files): place: enumerate control sets - http://bit.ly/i6Nq9u
<CIA-37> antares: Sebastien Bourdeauducq master * rb5f3c14 / (5 files in 3 dirs): pack: new architecture (incomplete) - http://bit.ly/goqqIl
<scrts> well, its not so easy to push video data stream, since it can't be interrupted :)
<kristianpaul> scrts: so yes, why not, but can you figure out how to dump video-in to a know format? thats the missing part i bet
<scrts> I have a task to do TS to IP
<scrts> however that will be on NIOS :\
<kristianpaul> hmm
<scrts> TS -> transport stream
<scrts> I think it will be MPEG-2 encoded
<kristianpaul> so conbus 2x5:  mico32 <-> slaves (NOR, ROM, USB, CSR, FML) that order arbitrer take cares i guess
<kristianpaul> and slaves, 5 to date are maped in memory at thar order
<Fallenou> kristianpaul: you mean "no pushing data to lan" is what the driver does best ? :p
<Fallenou> second thing being crashing
<kristianpaul> Fallenou: push to lan
<kristianpaul> not lan to mm1
<kristianpaul> i remner i get a 4x troughtput and not crash when pulling a fake file from the mm1 using ftp
<Fallenou> so you mean one way works better than the other ?
<kristianpaul> oh, yes i do
<kristianpaul> so lets say stream is much more posible ;-)
<Fallenou> oh ok so uploading from M1 works better than downloading
<Fallenou> well the new driver design should have improved the downloading part on M1 side :(
<Fallenou> too bad it didn't work
<kristianpaul> so conbus 6x1: (mico32, AC97, PFPU, TMU*, Minimac ) <-> slave FML  so this the DMA-like thing
<kristianpaul> as FML is the proper way in order to get to ram i guess
<Fallenou> yes
<kristianpaul> but note the TMU* is part also of the FML bus not just wishbone
<Fallenou> FML is Fast memory link
<Fallenou> it's aimed at accessing ram at high speed
<Fallenou> good for dma
<kristianpaul> i like High Trughput Link ;-)
<kristianpaul> Trought*
<kristianpaul> me so lazy, i took two weeks to understand this :(
<Fallenou> it's not easy to understand all these things, if it's not your field of study
<Fallenou> and if you do not have all the day to study it :)
<kristianpaul> all day, oh my shame..
<Fallenou> you're working right ?
<kristianpaul> yeap
<Fallenou> so you just have a look at milkymist during your free time
<Fallenou> it's usually a small amount of time :)
<Fallenou> not easy to progress
<kristianpaul> yeah, and meanwhile travel
<kristianpaul> but i'll get there :-)
<Fallenou> sure !
<kristianpaul> (field of study) i never took microprocesor subject at univesity, so yes i also had to read about it
<Fallenou> I mean you didn't study "soc design" as your main subject
<kristianpaul> nah
<Fallenou> neither do I
<Fallenou> my subject is not even electronic nor fpga at all
<Fallenou> it's more network and telecom
<kristianpaul> oh, i work on network security !
<Fallenou> nice :)
<kristianpaul> well more log analisys part but also network too
<Fallenou> oh
<Fallenou> I met a guy yesterday who did log analysis for network too
<Fallenou> at getitmade meeting :p
<kristianpaul> :_)
<Fallenou> is really chatty
<Fallenou> speaks too much