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<_whitenotifier-f> [sphinx_materialdesign_theme] mithro opened issue #13: Make theme advertise as parallel compatible - https://git.io/Jfh4z
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<daniellimws> mithro: Where does sphinx say anything about this? ^
<mithro> @daniellimws About?
<daniellimws> mithro: About the theme not being compatible
<mithro> @daniellimws I'm using the theme on https://github.com/google/skywater-pdk and due to the large number of pages I enable parallel builds by using "-j"
<tpb> Title: GitHub - google/skywater-pdk: Open source process design kit for usage with SkyWater Technology Foundrys 130nm node. (at github.com)
<tpb> Title: skywater-pdk/Makefile at master · google/skywater-pdk · GitHub (at github.com)
<daniellimws> mithro: Oh does the theme just need to declare that it is parallel compatible?
<mithro> unclear
<mithro> I just saw the error fly past and thought I would log the issue before I forgot
<tpb> Title: Declare that theme is parallel read and write safe by daniellimws · Pull Request #14 · SymbiFlow/sphinx_materialdesign_theme · GitHub (at github.com)
<_whitenotifier-f> [symbiflow-examples] mithro opened issue #26: Add an example for a Zynq part - https://git.io/JfhR5
<_whitenotifier-f> [symbiflow-examples] mithro opened issue #27: Add support for the 100T variant of the Arty A7 - https://git.io/JfhRF
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<mithro> @daniellimws Have to get you some harder bugs, you keep fixing my issues so quickly!
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<daniellimws> mithro: :P
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<_whitenotifier-f> [sphinxcontrib-verilog-diagrams] mithro opened issue #42: Change the authors bit in setup.py - https://git.io/Jfh0R
<tpb> Title: Contributors to SymbiFlow/sphinxcontrib-verilog-diagrams · GitHub (at github.com)
<daniellimws> getting close
<mithro> @daniellimws Heading out for the night -- have a good one!
<daniellimws> you too
<_whitenotifier-f> [sphinxcontrib-verilog-diagrams] mithro opened issue #43: Readme Rst is broken - https://git.io/Jfh0Q
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<mithro> https://github.com/BrunoLevy/learn-fpga -- RV32 on an icestick!
<tpb> Title: GitHub - BrunoLevy/learn-fpga: Learning FPGA, yosys, nextpnr, and RISC-V (at github.com)
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<_whitenotifier-f> [symbiflow-website] mithro opened issue #55: Getting started page on the website needs work - https://git.io/Jfhb1
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<_whitenotifier-f> [prjxray-bram-patch] mithro opened issue #39: Figure out why GitHub thinks you have a lot of "LLVM" code - https://git.io/JfhA9
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<sf-slack3> <timo.callahan> @kgugala -- Digilent now has two accelerometers -- do you know if they both work with the tflite demo?
<tpb> Title: Pmod ACL: 3-axis Accelerometer - Digilent (at store.digilentinc.com)
<tpb> Title: Pmod ACL2: 3-axis MEMS Accelerometer - Digilent (at store.digilentinc.com)
<sf-slack3> <timo.callahan> They have slightly different chips
<sf-slack3> <kgugala> The demo uses acl2
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<sf-slack3> <kgugala> Sorry ACL
<sf-slack3> <kgugala> We use i2c to read the sensor
<sf-slack3> <kgugala> ACL2 does not support i2c
<sf-slack3> <timo.callahan> Thanks!
<sf-slack3> <timo.callahan> We are buying some more for the intern and other mentor
<_whitenotifier-f> [fpga-tool-perf] mithro opened issue #174: Capture the logic depth / max frequency after synthesis - https://git.io/JfjeP
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<enriq> Hi. Where can i find the list of supported devices?
<tpb> Title: SymbiFlow - the GCC of FPGAs (at symbiflow.github.io)
<enriq> ah ok, and I can just look what chip a given board uses and use that in my circuit
<enriq> I mean you don't rely on anything else from those boards
<sf-slack3> <kgugala> enriq: yes, that is true we do not rely on anything outside the chip
<sf-slack3> <kgugala> which one you'd like to use?
<enriq> I think I don't need much, I was thinking in ICE40LP384-SG32
<enriq> but as I'm a noob I still would need to try to generate for a given device to see if it fits
<tnt> All ice40s are supported by the yosys/nextpnr flow
<tnt> Oh wait ... maybe not LM ?
<tnt> yeah, no LM and no UltraLite
<enriq> I need not much, but also has to be not impossible to solder
<enriq> i.e. <15 pins IO
<enriq> and some simple logic function to implement (conters, triggers... the most complex would be some serial interface)
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<enriq> UltraPlus yes UltraLite no, right?
<tnt> yup
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<enriq> ah oh does it build on mac?
<enriq> (the toolchain)
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<Lofty> enriq: should do
<enriq> at some point of make conta_all it tries to execute conda.exe
<enriq> what's the difference between this project and openfpga
<Lofty> Well, openfpga isn't really a project
<sorear> by openfpga do you mean nextpnr?
<enriq> Lofty that it should build on osx means that it's tested and works or that there is no reason why it should not build in theory
<Lofty> The latter, at least for the vanilla toolchain
<Lofty> I think they do test it on Mac, but there's no CI for it
<enriq> what is the vanilla toolchain? I'm following the getting started
<tpb> Title: GitHub - YosysHQ/yosys: Yosys Open SYnthesis Suite (at github.com)
<tpb> Title: GitHub - YosysHQ/nextpnr: nextpnr portable FPGA place and route tool (at github.com)
<enriq> cool thanks, I'll try
<enriq> ah ok I have those with brew
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<_whitenotifier-f> [symbiflow-website] mithro opened issue #57: Need a "getting help" section of the website - https://git.io/JfjtY
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<_whitenotifier-f> [symbiflow-arch-defs] andrewb1999 opened issue #1550: Support multiple synth IO tiles at the same vpr coordinate - https://git.io/Jfjql
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