07:55 <_whitenotifier-f> [symbiflow-arch-defs] rakeshm75 opened issue #1537: Branch : Quicklogic : Failed to find matching architecture model for 'mux4x0' - https://git.io/JfNhg

15:46 <mithro> @daniellimws_ -- You added a feature which skips the copyright header when including come somewhere -- I was unable to find it recently however...

15:51 <daniellimws_> mithro: we merged that some time ago https://github.com/SymbiFlow/sphinxcontrib-verilog-diagrams/pull/20

15:51 <tpb> Title: Directive to include code without license header by daniellimws · Pull Request #20 · SymbiFlow/sphinxcontrib-verilog-diagrams · GitHub (at github.com)

15:54 <mithro> @daniellimws_: It doesn't look like we documented it anywhere?

15:54 <daniellimws_> Hmm lemme try to find it

15:55 <_whitenotifier-f> [sphinxcontrib-verilog-diagrams] mithro opened issue #24: Add a clearer link to the readthedocs documentation - https://git.io/JfA58

15:55 <daniellimws_> mithro: The documentation is here at the top of the file https://github.com/SymbiFlow/sphinxcontrib-verilog-diagrams/blob/master/docs/index.rst

15:55 <tpb> Title: sphinxcontrib-verilog-diagrams/index.rst at master · SymbiFlow/sphinxcontrib-verilog-diagrams · GitHub (at github.com)

15:56 <daniellimws_> Looks like readthedocs is not updated?

15:56 <_whitenotifier-f> [sphinxcontrib-verilog-diagrams] mithro opened issue #25: Document the no-license-include stuff - https://git.io/JfA50

15:57 <daniellimws_> I can add them to the readme too

15:58 <mithro> daniellimws_: Can you access https://readthedocs.org/dashboard/sphinxcontrib-verilog-diagrams/users/ ?

15:59 <daniellimws_> It tells me the page does not exist

16:03 <mithro> @daniellimws_ Can you login?

16:06 <_whitenotifier-f> [sphinxcontrib-verilog-diagrams] mithro opened issue #26: Build failing on readthedocs - https://git.io/JfA59

16:07 <daniellimws_> mithro: Oh now it works, yup I logged in with my github account

16:12 <mithro> daniellimws_: It seems to be a yosys issue?

16:12 <daniellimws_> mithro: What are you referring to?

16:13 <mithro> https://github.com/SymbiFlow/sphinxcontrib-verilog-diagrams/issues/26

16:13 <tpb> Title: Build failing on readthedocs · Issue #26 · SymbiFlow/sphinxcontrib-verilog-diagrams · GitHub (at github.com)

16:15 <daniellimws_> mithro: The error is because of this https://github.com/SymbiFlow/sphinxcontrib-verilog-diagrams/pull/13

16:15 <tpb> Title: Add -compat-int option to write_json for netlistsvg to work by daniellimws · Pull Request #13 · SymbiFlow/sphinxcontrib-verilog-diagrams · GitHub (at github.com)

16:16 <daniellimws_> At that time this option had to be added so that symbolator would work, but I vaguely remember yosys might have changed this again

16:16 <daniellimws_> I'll remove the option and see if it works

16:16 <mithro> @daniellimws_ -- I think it is indicating that the wrong version of Yosys is being used?

16:18 <daniellimws_> mithro: Yea I think the option only works with the latest dev version, while conda installs the latest release

16:19 <daniellimws_> Actually I'm not sure if I'm saying this right

16:20 <daniellimws_> I'll try removing that option

16:21 <daniellimws_> mithro: Gonna sleep, will check out those issues tomorrow

16:32 <mithro> @daniellimws_ - No worries

18:12 <_whitenotifier-f> [symbiflow-arch-defs] andrewb1999 opened issue #1538: Multiple mapped tiles when creating synth io tiles - https://git.io/JfAAS

21:14 <sf-slack3> <timo.callahan> General question: has anyone ever received an Arty A7 board that DIDN'T have the GPIO demo (cylon etc.) pre-installed in flash?