<azonenberg_work> Yeah i'm on the bike a lot longer
<azonenberg_work> i will say, last smokepocalypse i tried wearing a disposable
<azonenberg_work> And it was super uncomfortable
<azonenberg_work> i think i still have one on the bike in case the SHTF unexpectedly but i'd never wear it by choice
<awygle> maybe they don't fit your face well
<awygle> mine is fine
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<shapr> aw man, I was just about to ask m_w a question
<shapr> dang
<shapr> missed it by four minutes
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<sorear> The redis thing doesn’t sound much different from AGPL?
<sorear> rqou: afaik, current win10 supports the utf8 code page as a user opt-in; still remains to deprecate the other code pages
<rqou> it does?
<rqou> as the global non-utf16 encoding?
<sorear> Yes, there’s a checkbox somewhere to enable it
<rqou> wait, why haven't people been talking about this?!
<rqou> got a link?
<rqou> whitequark: wait, TB ICM runs in SMM? i thought it was a microcontroller hidden inside/next to the TB controller
<rqou> or is that something else?
<rqou> (there's a cortex-m visible in all the teardowns of early tb devices and macbooks (port ridge or cactus ridge))
<pie_> kc8apf, digshadow tells me youre into parsing binary formats
<iximeow> pie_: uh oh what are you parsing?
<pie_> nothing yet, just research :p
<pie_> binary executable formats i guess, but that could be extended to other thing
<pie_> *things
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<rqou> hmm still quite interesting
<rqou> this means that people "dealing with" windows unicode stupidity by ignoring it really is starting to hurt msft
<rqou> probably in "cloud" stuff
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<awygle> holy shit, is there seriously no way to get the list of all git config options?
<kc8apf> pie_: yes. I've written quite a few parsers. Do you have questions?
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<whitequark> rqou: not a clue
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<rqou> whitequark: if you make any progress with any RE please document it well? :P
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<rqou> whitequark: also did you see my half-serious question from about a week ago?
<noopwafel> rqou: you weren't kidding about the python scripts btw, I was impressed :)
<rqou> noopwafel: which ones?
<whitequark> rqou: which question?
<rqou> my hideous ones?
<noopwafel> yes
<rqou> whitequark: i've been brainstorming building a "fun" project using the ads1299 (which you should definitely go skim the datasheet for since it might come in handy for some serious projects in the future)
<rqou> whitequark: tl;dr it's an eeg/biopotential microvolt adc
<whitequark> right
<rqou> whitequark: i was wondering if this can be used to distinguish various forms of intoxication :P
<whitequark> oh
<whitequark> hmmmmm
<whitequark> >METHODS:
<whitequark> Adolescent male vervet monkeys were trained to self-administer ethanol (n=7) or an isocaloric malto-dextrin solution (n=3). Following training, animals received 12 months of free access to ethanol. Animals then underwent RS magnetoencephalography (MEG) and subsequent power spectral analysis of brain activity at 32 bilateral regions of interest associated with the chronic effects of alcohol use.
<whitequark> RESULTS:
<whitequark> demonstrate localized changes in brain activity in chronic heavy drinkers, including reduced power in the anterior cingulate cortex, hippocampus, and amygdala as well as increased power in the right medial orbital and parietal areas.
<rqou> hmm that's neat
<rqou> but i was more thinking "partied too hard" intoxication rather than "chronic heavy drinkers"
<whitequark> the main problem is
<whitequark> you need large samples of various intoxicants to determine this with any degree of reliability
<whitequark> and thats not very ethical
<whitequark> but yes, I'd say this is probably possible
<whitequark> not currently done because it's easier to just run HPLC-MS on urine or w/e
<rqou> ok i guess i'll probably just stick with detecting blink/eyes-closed-relaxed/alert :P
<rqou> which on the existing toy i can control at least 60% of the time, so better than chance :P
<whitequark> try uhh
<whitequark> try detecting the excitation potentials of vocal cord innervation
<whitequark> you dont actually need to speak, thinking about speaking is enough
<whitequark> well that or finger movement
<rqou> hmm where would i need to place electrodes for that?
<whitequark> i think doing this kind of stuff with eeg is dumb
<whitequark> like you're fundamentally limited by the low-pass filter of skull.
<whitequark> no amount of signal processing is going to make your results much better
<rqou> tbh i'm only expecting to reliably detect the direction the eyes are looking
<whitequark> that seems like an extremely tall order to me
<rqou> which afaict does work, even with a "class project" quality device
<whitequark> really? hm
<whitequark> interesting
<rqou> it relies on detecting the potential between the front and back of the eyeball
<rqou> not eeg signals at all
<whitequark> oh.
<whitequark> oh yeah that would do it.
<whitequark> "Functional Electrical Stimulation of the Feline Larynx With a Flexible Ribbon Electrode Array." hrm
<rqou> when i last tried it (which official policy was that you weren't supposed to :P ) you just need two electrodes on the temples to detect the direction of the eyes
<rqou> whitequark: so what are your thoughts on NeuroSky?
<rqou> i seem to have "better than chance" control of it
<whitequark> rqou: key words re vocal cords is "electroglottography"
<whitequark> pubmed has tons of info on it
<rqou> O_o i had no idea this was even possible
<rqou> so exactly how many parts of the body just so happen to produce tiny electrical signals?
<whitequark> all of them
<whitequark> doesn't even have to be nerve or muscle
<whitequark> though those two are certainly the two easiest to record
<whitequark> hell, we have limited evidence that plants communicate via slowly changing magnetic fields
<rqou> wait what
<rqou> how did we find this out exactly?
<whitequark> oh this kinda stuff has been on for a very long time
<whitequark> it used to be the domain of cranks
<whitequark> like you know, psychics sensing the health of plants and shit like that
<rqou> why do i not see more hobbyists playing with biopotential sensors like this?
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<whitequark> well
<whitequark> dunno, first you have to set up helmholtz coils and then you wait a month and note that a plant grows slightly slower
<whitequark> i think most people would consider that interesting as fuck. not.
<rqou> i meant for eeg/emg/other-biopotential-things
<rqou> isn't there this whole "biohacking" scene?
<whitequark> it's a joke
<whitequark> no one in the biohacking scene understands what htey're doing
<rqou> heh ok
<rqou> whitequark: know anything about the NeuroSky toys btw?
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<whitequark> rqou: uh I think they're like, bog standard cheap EEG machines?
<whitequark> I briefly looked at them, decided that this is 1960s science packaged in a pretty case and moved on
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<rqou> yeah but *) they don't actually output raw data *) a company put some into some actuated cat ears :P
<rqou> but fair enough
<whitequark> also emg actually requires you to understand dsp a bit
<zkms> ooh cat ears?
<rqou> oh they're discontinued?
<rqou> well i guess you'll have to search around
<rqou> zkms: as for "does it work" -- for me it works about 60-70% of the time
<rqou> unfortunately these aren't very comfortable to wear for an extended amount of time
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<rqou> whitequark: why are all research-grade biopotential measuring devices so huge and bulky when parts like the ads1299 exist?
<whitequark> rqou: have you seen academic source code?
<whitequark> now imagine academics doing hardware
<rqou> lol ok
<whitequark> remember when I designed a quadrupole mass filter that was like orders of magnitude more compact AND more flexible than almost everything used today
<rqou> at least i did find a bachelors/masters thesis from some guy who basically asked this exact same question
<whitequark> well, I kinda fucked up with component selection, used one of those beryllia substrate class A amps
<whitequark> turned out it was shit
<whitequark> sb0 eventually replaced it with...
<whitequark> an ADSL line driver
<rqou> lol i remember that
<whitequark> that was like 100 times less expensive
<whitequark> but still, the concept worked perfectly
<rqou> oh wow this is ridiculously cheap
<rqou> a _VDSL2_ line driver is like $4
<rqou> (THS6214)
<whitequark> oh so more like 500 times
<rqou> the ads1299 is unfortunately really expensive
<rqou> like $30
<whitequark> though I don't recall how much PA95 cost exactly
<rqou> zomg digikey says $150
<rqou> wait this is beryllia?
<whitequark> yea
<rqou> it's neither white nor purple
<whitequark> ...
<whitequark> the beryllia is inside
<whitequark> bonded to die and heatsink
<rqou> ah ok it's not the giant rf power transistors that have exposed berillia
<rqou> oh hmm apparently even those encapsulate the beryllia pretty well
<rqou> since apparently cancer is bad
<sorear> how overblown are beryllia toxicity claims
<whitequark> berylliosis isn't cancer iirc
<whitequark> right, it's more like an autoimmune disorder
<whitequark> sorear: a single exposure to beryllium in just the right way can give you incurable symptoms a decade later
<sorear> if 100kg of it lands on your head from sufficient height, you don’t need to wait
<whitequark> like. do you REALLY want to take that chance?
<zkms> whitequark: wait how did you replace PA95 with an ADSL line driver
<whitequark> zkms: need a transformer
<whitequark> but it doesn't have to be resonant
<whitequark> unlike in typical QMF designs
<whitequark> so just a transformer
<whitequark> you do need a reasonable pass band but note that with my design, higher m/z means *lower* frequency
<zkms> ah so it's an ac voltage you're making
<whitequark> so you would be typically limited at the hydrogen end of range
<rqou> whitequark: does m-labs have a resident magnetics expert or something?
<whitequark> rqou: no
<rqou> it seems you're quite willing to throw custom magnetics at things
<whitequark> you just buy the fucking parts and wind the fucking transformer
<whitequark> it's trivial
<rqou> without doing the math?
<whitequark> well mostly
<whitequark> you need to ensure the core doesn't saturate
<rqou> right
<whitequark> and just generally be aware of the properties of the core
<whitequark> but you don't need a lot of math
<whitequark> winding those things is a bitch though
<whitequark> especially high-voltage ones.
<whitequark> god i hate them
<rqou> but you also need do check things like "will i get the desired inductance" and "do the windings actually fit in the window"
<whitequark> oh
<whitequark> no m-labs uses my LCR meter and a file
<rqou> loool
<whitequark> you file the core down until the gap gives you the desired inductance
<whitequark> for flybacks anyway
<rqou> W H A T
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<whitequark> this is how you make flyback transformers.
<rqou> i guess that works
<whitequark> seriously.
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<rqou> i'm sure my professor would have liked that :P
<zkms> whitequark: nice
<rqou> hmm what's special about winding high voltage transformers?
<whitequark> rqou: you get dielectric breakdown lol
<whitequark> and then it starts arcing
<whitequark> and then it gets on fire
<whitequark> and then you have to wind the ENTIRE FUCKING THING FROM SCRATCH
<whitequark> fuck that
<rqou> just between the primary/secondary or between different layers of the same winding too?
<whitequark> depends on the design
<whitequark> how many volts per turn
<whitequark> I once got arcing between... two different transformer leads
<whitequark> had to add a bodge on the board
<rqou> um... that sounds doubleplusunfun
<whitequark> yeah the coilformer melted and started burning
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<whitequark> slightly
<whitequark> i turned it off and blown it out
<rqou> i'm surprised you never ended up with the really silly problem of "now the windings don't fit in the window anymore"
<whitequark> all hail UL94 rated plastic parts
<whitequark> oh i did
<rqou> which happened to me multiple times in lab
<whitequark> that's why i always buy like three different wire thicknesses
<whitequark> if i fuck up i rewind with thinner wire and derate current :P
<rqou> you still have to start the winding all over again
<whitequark> it's harder on HV because you have to use insulating tape between layers
<whitequark> and that adds small but appreciable thickness
<whitequark> that adds up to quite a bit
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<pie_> <whitequark> remember when I designed a quadrupole mass filter that was like orders of magnitude more compact AND more flexible than almost everything used today
<pie_> huh.
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<fseidel> rqou: what, you mean you didn't overclock your ECU? How else will you run crysis?
* shapr adds more crystals
<felix_> .oO(car-tuning with crystal meth?) /me nopes away ;P
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<q3k> whitequark: if you feel like snailmailing that adapter to Ireland I could probably get the flash dumped
<whitequark> q3k: oh i can dump the flash easily enough
<whitequark> just desolder the two suspect ICs and the PD controller and trace
<whitequark> but i'm not gonna reverse-engineer a megabyte of code genreated by some shitty ti tool
<q3k> ack
<q3k> open in ida, press tab, ????, NO PROFIT
<q3k> still slight nightmares after reversing the tegra x1 bootrom
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<jn__> hey, is anyone here but pie_ and me going to be at Camp++?
<felix_> hmm, camp++ looks interesting, but doesn't align with my travel plans. if it was one weekend later, i'd probably have dropped by, since i'll be in budapest then anyway
<jn__> ah :/
<q3k> yeah, shitty time for me too
<q3k> :(
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<shapr> Hungary is far away
<rqou> so many things in Europe rather than the People's Republic of California
<awygle> if i was not an american i would certainly think twice about conferencing here
<shapr> @seen m_w
* shapr grumbles
<shapr> I shoulda asked yesterday
<scrts2> quick question: is there a simulation tool for silego stuff?
<scrts2> like a modelsim?
<rqou> scrts2: azonenberg has simulation models
<rqou> depending on what you want to simulate that might work?
<rqou> no verilog ams models for the analog blocks yet though
<rqou> +since no foss verilog ams simulator either)
<etrig> any one have recommendations for events on the east coast of divided states?
<shapr> oh good question, I wonder if there's a verilog or FPGA meetup group around here?
<sorear> You and I and cr1901_modern and fseidel coukd start one
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<sorear> Where are you? I’m in providence, much farther than philly is problematic
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<etrig> I'm a couple hours from DC
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<etrig> south, unfortunately
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<shapr> m_w: HEY! what's the address of the gpmc in the BeagleWire/BBB? I'm trying to figure out how to work https://github.com/pmezydlo/BeagleWire/tree/master/examples/arm_blink_leds and I think I just need to write to /dev/mem at the correct address
<m_w> shapr, yeah I believe so
<shapr> thanks, I'll try that
<shapr> Is there a BeagleWire forum where I can ask these kinds of questions, and see what other questions have been answered?
<shapr> aha! that's even better!
<m_w> there is not a forum for the beaglewire specifically
<m_w> I have been toying with the idea of making one similar to tinyfpga
<shapr> I convinced six of my software dev coworkers to buy beaglewires for an FPGA dev class I'm teaching, I'm sure there will be questions
<shapr> and by "teaching" I mean I'm trying to stay at least one lesson ahead of everybody else
<m_w> shapr, awesome!
<shapr> yeah, it'll be great fun!
<shapr> m_w: thanks for making the beaglewire!
<m_w> it was a fun little project
<m_w> hoping all goes well with the class
<shapr> learning is half things not going well, it'll be fun whatever happens
<m_w> so far I have been doing most of the support via email from crowdsupply
<m_w> most people are having trouble getting there BBB setup
<tinyfpga> m_w: what FPGA are you thinking of using for a small board?
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<shapr> yeah, the root/root login/pw isn't documented anywhere
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<m_w> tinyfpga, small board?
<shapr> m_w: don't see login/pass mentioned on that page anywhere
<m_w> shapr, I will have to add it
<m_w> one second
<tinyfpga> maybe I missed the context of this message: “11:57 m_w: I have been toying with the idea of making one similar to tinyfpga”
<shapr> I also haven't seen explicit instructions on how to install the yosys suite on the beaglewire, so I've been building on my laptop and scp'ing the .bin over, which is fine for now
<shapr> tinyfpga: user forum
<shapr> tinyfpga: I was asking if there was a user forum for the beaglewire, since I have many questions, and fewer answers
<shapr> and six I convinced six of my coworkers to buy beaglewire boards for a class I'm 'teaching'
<tinyfpga> m_w: ohhhh! Yeah, I like discourse, I recommend it if your look
<m_w> tinyfpga, yeah that
<tinyfpga> -ing to start one
<m_w> shapr, I add the username and password to the elinux page
<shapr> thanks!
<m_w> tinyfpga, I have been thinking of doing a ecp5 based board in the pocketbeagle form factor
<shapr> oh, I didn't know about that login :-)
<shapr> that explains why the load_fw script is in /home/debian instead of /root
<tinyfpga> m_w: ecp4
<tinyfpga> m_w: ECP5 is a great chip
<m_w> oh?
<m_w> the assembly looks tricky
<m_w> shapr installing yosys on the beagle is pretty involved as you have to compile it from source
<shapr> eh, I don't mind compiling from source, I'm a professional software dev for ~25 years
<m_w> and it takes forever
<sorear> No yosys from the distro?
<shapr> yeah, an apt source that has compiled yosys would be nice
<shapr> ah, I can run that now and see how long it takes
<m_w> I don't know if there is a debian package for yosys
* sorear wants to see someone get a riscv+MMU working on a ecp5+ram board and then run prjtrellis as a (fairly useless) demo
<sorear> This requires prjtrellis to get far enough to use the DDR I/Os and probably a few advanced clocking features, an open DDR interface for ecp5 (there’s a lattice one so this should be possible), and a fairly compact riscv64gcs core
<shapr> m_w: oh there is, I'll see if it's built for armhf
<shapr> sorear: build it?
<sorear> It’s on my list, I’m hinting for someone to snipe it
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<tinyfpga> sorear: daveshah got picorv32 on ECP5 with prjtrellis, but it’s limited due to lack of bram support and other things
<tinyfpga> sorear: still a neat demo
<daveshah> yeah, once we have global nets, bram and ddr io done a lot will be possible
<daveshah> Give it a few months :)
<daveshah> SDRAM would work to start with
<daveshah> DDR3 would be a bit more work
<daveshah> Due to multiple clock domains, all the fancy IO stuff, etc
<sorear> Can you buy a SDRAM large enough for Linux and nextpnr?
<daveshah> If you don't care about speed or longevity for a demo, you can swap to sd card
<awygle> "nextpnr on ecp5" would be awesome
<awygle> enough to overcome my general disinterest in cpus on fpgas :p
<daveshah> Looks like old computer sdram sticks get pretty large
<daveshah> I do want to get Rocket running on ecp5 once things have moved forward a bit
<sorear> If I do this it’ll necessarily be on someone else’s board design
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<sorear> awygle: no “zynq for ecp5” so you take what you can get
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<awygle> sorear: my take is this is a difference of degree sufficiently large to create a difference in kind
<awygle> a zynq is a useful cpu with attached programmable logic
<awygle> i'd much rather see beaglewire ecp5 than riscv ecp5, with the exception of a "fully self-reconfigurable system" demo as noted above
<awygle> but my interest is totally unnecessary to other people doing their thing so w/e
<shapr> wow, ecp5 has way more LUTs than ice40
<shapr> yeah, now I want an ecp5 beaglewire
<daveshah> Over 10x for the biggest part
* shapr bribes m_w
<m_w> ha
<m_w> well I really didn't make any money of the beaglewire
<shapr> aw, sorry to hear that
<shapr> up the price for the ecp5 version?
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<sunxi_fan> hello, i'm too "drooling" for the support of the ECP5 family (and many thanx to daveshah for the commitment!!), the opensource toolchain is getting to the next with such a beefy family..
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<sunxi_fan> i've been so excited that i was looking for an ECP5 board to purchase.. not that many currently available! as many open source design are still on development..
<awygle> sunxi_fan: what would you like to see on an ecp5 board?
<sunxi_fan> currently i've found a recent devel board from Lattice itself, the EmbeddedVisionDevelopmentKit https://www.latticesemi.com/en/Products/DevelopmentBoardsAndKits/EmbeddedVisionDevelopmentKit
<q3k> there's probably at least 5 people on this channel tiptoeing around the idea of making an ecp5 devboard now :)
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<sunxi_fan> what do you think about the ratio price/features?
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<daveshah> I put out a spec for one a while back, which I'm working on when I want to do some nice relaxing design
<daveshah> It's going to be high end, and if sold won't be cheap as a result
<sunxi_fan> currently i was looking for ANY board for an impulse purchase.. let me tell you i'm a bit of a "FPGA junkye"! :-)
<daveshah> This one looks interesting
<q3k> sunxi_fan: I like my ECP5-5G Versa
<awygle> sunxi_fan: i would say it depends on what you're interested in doing. i am personally more compelled by the Versa board, or the one daveshah just linked
<daveshah> But that would be a bit of a mystery buy at the moment
<sunxi_fan> Dave, i did see your RFC for a beefy ECP5 board. i commented too on the twitter thread!
<awygle> but i'm specifically interested in PCIe which is why the Versa is good
<q3k> although that got expensive
<shapr> daveshah: $500 board?
<q3k> although it's still probably the cheapest fpga board with transceivers (maybe apart from some S6 boards)
<awygle> the EVN looks like it has transceivers
<awygle> and it's only 100$
<daveshah> shapr: Probably would end up around that mark (I wouldn't be selling it myself, but Edmund might try and get trenz to sell it)
<q3k> awygle: oh uh, you're right
<sunxi_fan> but i currently like the idea to 'eventually' help during the finalizing of the many FPGA features "fuzzing" something and learning the RE process along the way..
<q3k> awygle: 5G, too
<awygle> yup :D
<gruetzkopf> i'm after "the smallest one which can support pcie at all"
<q3k> awygle: although no SMA connectors
<daveshah> Because they'd double the price
<q3k> awygle: can't see any high speed connectors at all
<awygle> gruetzkopf: physically smallest, that's probably picoevb
<daveshah> Could probably do PCIe with some ridiculous sma monster
<gruetzkopf> BOM-cost-smallest ;)
<daveshah> But Versa would be cheaper than that combo
<shapr> gotta make money somehow, and darpa isn't helping
<awygle> q3k: the pads in the upper left are for SMAs
<q3k> awygle: oh, alright
<awygle> idk if they'd be populated when you bought it or what but the pads exist
<gruetzkopf> derpa.
<daveshah> shapr: we wouldn't make money on this
<q3k> awygle: they're saving money on not installing them i guess :)
<shapr> :-(
<q3k> awygle: those things can get expensive
<daveshah> That would just cover trenz's cost
<daveshah> Like the icoboard
* awygle needs to make his ecp5 compute module already
* awygle probably has glasgow work to do though, will do that this evening instead
<q3k> awygle: i'm building something targeting the LFE5U-25F, maybe we should coordinate somehow
<q3k> awygle: wouldn't mind splitting it into a carrier and a compute module
<gruetzkopf> sma is so overkill for pcie
<awygle> q3k: oo interesting! more details in PM perhaps? (lotsa crosstalk here)
<sunxi_fan> daveshah: i'm wondering if testing eventually "broken test firmware" can lead to FPGA internal shorts, leading to the "magic smoke". what do you think?
<gruetzkopf> do i have to dig out a photo of the cursed adapter again?
<daveshah> sunxi_fan: yes, the ecp5 might suffer from internal shorts if you break the two hot encoding scheme
<daveshah> But there's no way to create them just from bad routing, as there are no bidirectional switches or segments with multiple possible drivers
<sunxi_fan> another "ECP5 design" low-key i found was the FleaFpga Ohm board.. what do you think of his approach.. a hat for a Raspi Zero, more or less..
<awygle> yes, the ohm is cool. i own one
<awygle> but it's only a 25F iirc
<sunxi_fan> it's a pity he didn't put another batch for production&sale after a successful crowdfunding campaign.
<awygle> so depending on what you need, might not be big enough
<daveshah> I would like to see the ULX3S for sale
<daveshah> But I don't know whether or not that will happen
<sunxi_fan> BTW is the 25F one of those FPGA die "marketing driven" ? :-)
<sorear> Stretch demo idea: reconfigure transparently to software by flushing all state to RAM and rebooting the FPGA
<sorear> No, you want the 12k
<sorear> 12k and 25k have same # config bits
<daveshah> sorear: hmm, I suppose with dram auto refresh it might work
<daveshah> Yes, 12k and 25k are the same dice
<daveshah> But 25k, 45k and 85k are all different
<shapr> ul3xs looks nice, so many luts
<daveshah> SERDES and non-SERDES are also the same
<sorear> ( is the 12k the lowest $/lut part currently available from any vendor?)
<daveshah> But I expect the non SERDES ones to have out of spec SERDESs
<daveshah> sorear: must be even without hacking
<sunxi_fan> indeed. i did check with Diamond some bitstream size on a simple demo design, but i didn't get to the 12k part, to verify..
<sorear> daveshah: can you reboot the fpga in 16ms? dram decay isn’t that fast
<daveshah> No, probably not
<daveshah> Bitstreams are quite big
<daveshah> Might need a peltier cooler or something :P
<sorear> ecc :P
<sorear> scrub any flipped bits after reboot
<sunxi_fan> i twitted to the guys of the UL3X but they are still hand soldering the BGA on the prototypes, and still evaluating the PCBA process. the break even point for the production of such a board is not that easy.. indeed.
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<sorear> bad project ideas: learn pcb design, put $10k of lattice parts in a box, teach yosys how to deal with the resulting mess
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<sorear> I tried to work out a price/perf comparison w copacabana the other day but it turns out DES really wants LUT6
<q3k> sunxi_fan: if you have too much time on your free hand you can definitely handassemble an ULX3S at home
<q3k> sunxi_fan: made myself one this way :P
<sunxi_fan> q3k: i suppose i could assemble one at work where there's an oven, indeed.. is the BOM on kitspace complete?
<q3k> yes
<q3k> used it directly to order from mouser
<sunxi_fan> it would be really an experience on itself!
<q3k> got the pcb from oshpark
<q3k> and hotair'd the ECP5
<sorear> (also I don't even have enough PCB knowledge to estimate the price of boards for such a thing)
<sunxi_fan> you did have experience on hot/airing BGA?
<daveshah> Boards are dirt cheap these days
<sunxi_fan> because that part is pretty expensive.. right? do you have the board working now?
<cpresser> if you guys have ideas for a beginner #reworkctf, I made a pad to collect them: https://pads.aachen.ccc.de/p/beginner-rework-ctf
<q3k> sunxi_fan: i have it working now, yes.
<q3k> sunxi_fan: this was my... third time doing bga rework?
<daveshah> $48 for 10 ULX3S boards from jlcpcb afaics
<awygle> ECP5s are a maximum of 40$ for the most expensive on mouser
<q3k> i paid $80 for 3 from oshpark IIRC
<cpresser> my target audience is people that have some solder experience, but don't think they can do smd
<awygle> daveshah: have you used jlpcb? how was it?
<sunxi_fan> really kool! which part 25, 45 or 85?
<daveshah> awygle: not directly but I believe I've used a reseller at least once
<daveshah> Mean to try them next, their specs are really good
<awygle> cpresser: that's a great idea
<awygle> something between azonenberg_work's hellscape and that really easy one
<awygle> daveshah: ah ok. they're _so cheap_ and their specs are _so good_ that i'm suspicious
<gruetzkopf> i've used them a fair bit
<cpresser> awygle: yep, I am aming somwhere between those two
<gruetzkopf> didn't have a design rejected yet
<sorear> the 12k without serdes is $5 and a bit over a sq cm
<gruetzkopf> and what i got from them is of excellent qualit
<awygle> gruetzkopf: on anything relatively tight? 3.5mil traces?
<daveshah> I would love to have volume pricing numbers for the ecp5
<daveshah> Shame things are so opaque
<awygle> 0.45mm vias?
<gruetzkopf> .45mm vias work, didn't push the 3.5mil to the limits yet
* awygle makes a "hmm" sound
<q3k> daveshah: call them, just don't mention who you are :)
<daveshah> q3k: Yep, that's what a having a ltd is for
<sorear> ltd=llc¿
<q3k> yes
<daveshah> Used that to apply for the kit license too for the same reason
<sorear> does 1k-10k count as "volume pricing"?
<awygle> damn, a six-layer so-dimm at jlpcb costs 112$ for 10 pieces. that's cheap.
<q3k> oh uh
<q3k> that is cheap
<q3k> but what colour is the soldermask?!
<awygle> green. red costs 2$ more
<q3k> can't wait to do a medium-volume pcb order so I can get a hot pink soldermask
<awygle> as do yellow blue and white
<awygle> black is 10$ more
<awygle> no hot pink sadly
<q3k> black soldermasks are hell
<awygle> agreed
<awygle> we had a rule at planetary - no white, no black
<awygle> anything else is fine
<daveshah> sorear: maybe 10k, more like 100k or 1M with Lattice
<daveshah> I suspect by 1M the cheapest ecp5 would be down around the $2 mark
<daveshah> Based on rules of thumb at least
<awygle> it depends on what oyu mean by volume. if you want a fab lot, yeah, 100k+. if you want like, 10k pc/yr, a distributor will still give you a good deal i bet
<awygle> arrow quotes the 12F as 3.848 per unit although they don't say what quantity. there's an RFQ button.
<daveshah> Interesting, looks like the 256 pin bga package is now available
<daveshah> Shame it's not 1mm though
<q3k> what's wrong with 0.8?
<awygle> hard to do on osh rules
<awygle> i forget why
<awygle> can't fit a trace between the vias or somethin
<q3k> hum
<awygle> daveshah: any idea why there are no serdes-capable skus in the 256-ball package?
<sorear> any idea what the pricing is like on the anlogic and gowin parts?
<daveshah> awygle: perhaps they found it ate too many pins?
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<daveshah> Doubt there's a technical reason, just marketing feature sets
<awygle> ah maybe. couldn't get PDN impedance where they needed it without eating tons of GPIO you mean?
<daveshah> Yeah and marketing preferred gpio
<daveshah> sorear: I think Kynix had some anlogic parts with pricing
<daveshah> Lcsc I think actually. Struggling to find it now
<daveshah> $6 in qty 1k for 10k LCs, qfn88 package
<felix_> jlcpcb makes good pcbs. haven't ordered from them directly yet though; only via hackvana
<daveshah> I think that might have 64Mb stacked sdram too
<azonenberg_work> awygle: what sized ball pads
<azonenberg_work> does the 0.8mm bga have? And how many balls?
<azonenberg_work> iirc 0.4mm balls are doable with *some* (not all) interior traces escaped, 0.45 or 0.5 are not
<rqou> today in "red team is teh fail": somebody pasted some data into the wrong cell of a spreadsheet
<awygle> idk. It's not fully populated though which helps
<rqou> excel skills ftw :P
<q3k> azonenberg_work: eyeballing with calipers they look like 0.4
<sorear> anyway, the "big ecp5 nextpnr demo board" we come up with should have at least two of them imo
<q3k> awygle: at least on the 381 BGA
<sorear> more serdeses :p
<q3k> s,awygle,azonenberg_work,
<daveshah> sorear: could well be worth it given the fpga/board cost ratio
<q3k> i was thinking of building a multi-hx8k board for the lulz at some point
<q3k> like 9 hx8ks or something
<q3k> put om on a toroidal network
<q3k> ????
<awygle> hm. It would take 3 FPGAs to do the next tick of what I want with ecp5 instead of cyclone. Which probably does come out cheaper lol
<q3k> s,PROFIT,no idea what i'm doing,
<awygle> Or no actually, only 2
<awygle> Some version of a QDR link between them. Interesting. That's almost certainly cheaper.
* daveshah steals the ECP5 design to crowdsource an 8 serdes variant
<awygle> right? criminy, I need more serdes dammit
<q3k> just build a TIS-100 style board out of 85Fs
<azonenberg_work> awygle: marblewalrus
<azonenberg_work> but with ecp5 instead of 7 series
<azonenberg_work> you could reuse the backplane design
<awygle> Which one is that again? I need all the serdes, so they can't be used for chip to chip
<sorear> at 800 MT/s 6 general I/O ~ 1 serdes
<sorear> so for a large board it makes a lot more sense to use general I/O and not spend money on serdes parts, also better signal integrity/crosstalk at lower frequency? and for a small board you can get around the per-chip serdes limits by passing parallel data between chips
<sorear> at some latency cost
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<awygle> yup that was my plan. QDR type interface (independent source synchronous interfaces on both directions) to make an 8-serdes ecp5. my intended use case would be easier because it'd be 2 4-lane SERDES interfaces - no coordinating lanes across the two chips.
<awygle> Figure 66 lvds pairs for two 32 bit interfaces and a clock each
<awygle> Maybe a strobe for 70, 140 pins, lots but not *too* many
<awygle> sorear: it's actually 12 gpio because serdes lanes are bidir
<sorear> 12 gpio pin : 2 serdes pin : 1 serdes block
<awygle> well, 4 serdes pins, as they're differential. and i'd use "lane" because the ecp5 pairs up serdes into two-lane block things. but yes
<sorear> so at a 3:1 ratio there's basically no point in using the serdeses inter-chip?
<sorear> assuming single-ended ddr is a thing which works sufficiently well over 1cm
<awygle> well i wouldn't, not at these rates. on a kintex or something, sure. but you can do lots with gpio when you control both sides of the link and the board as well
<daveshah> single ended ddr over 1cm is pretty much ddr3
<daveshah> So that would be fine
<awygle> yup, most things work fine over 1cm
<pie_> kc8apf, yeah i have some questions sort of
<pie_> im probably gonna be offline a bit but im basically looking for nonshitty ways for specifying binary formats
<pie_> i want to to try writing some RE tooling and im trying to make it not suck (i.e. be actually good and usable and whatnot)
<pie_> so ive been collecting some papers on DSLs and the like, havent actually gotten around to reading them
<kc8apf> Heh. Everything I've tried is pretty terrible
<pie_> well, thats for the user side stuff anyway but theres also something called total parser combinators which might be interesting to look into
<pie_> that guarantee termination and well-definedness or something like that
<pie_> though thats probably an ideal for the moment since agda idris or coq might not be the most practical things to use yet, probably gonna try doing something in haskell
<pie_> haskell itself doesnt look like it has any nice libraries for dealing with _bit_streams (as opposed to bytestreams) so i might have to try writing something myself eventually
<pie_> thoguh i havent actually tried the stuff that does exist yet
<kc8apf> Parser combinators I've used are ok until you get to bitfields. Changing the underlying type mid parse tends to make things confusing or broken
<pie_> im assuming you mean when considering bytes as the basic type?
<kc8apf> Kaitai struct is fairly nice but only handles stateless parsing
<pie_> yeah i intend to look at kaitai
<kc8apf> I usually need to switch between bits and bytes quite regularly.
<kc8apf> Many of the libraries start with bytes then hack on bits
<pie_> well its a question how to categorize things, youd generally expect nonshit binary formats to be context free yeah? i mean i dont have much experience
<pie_> so maybe a nicer library could be done for less powerful things and still provide a method for if you need full on whatever, though preferably one would want ot make everytihng nice, but now im going very meta :p
<kc8apf> For Gaffe, I moved away from nom to packed_struct and some hacks
<pie_> whats gaffe?
<pie_> im not sure it would be sensible to attempt to replace fully general parsing with something, but i dont know what to scope to
<pie_> otoh, maybe i should just start writing prototypes and see what happens
<pie_> ok so maybe an actually answerable question, do you have any recommendations for things i should look into? could you list pain points you have maybe?
<pie_> what would you want from a dsl or library for parsing binaries
<pie_> im not actualyl sure its something that needs to be treated much different than parsing stuff for human consumption, but is different in some regards
<kc8apf> Main break from common parsers is not treating whitespace specially.
<kc8apf> Take a look through gaffe-xilinx repo. That's what I ended up with after using nom initially
<pie_> ok
<kc8apf> I can put some thoughts together later
<pie_> id appreciate it
<pie_> cant guarantee that anything will come of it, but im trying :D
<pie_> also if you have any recommendations for things that might give me a better grasp of the area
<q3k> i never understood the appeal of using binary parsing dsls versus just writing some code to do it
<q3k> in whatever language you're comfortable with.
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<pie_> q3k, yeah thats also valid
<q3k> most of my binare RE/parsing involves a hex editor and a python script
<q3k> never ever had to generalize any part of the code.
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<pie_> ok im off for now o/
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<shapr> aw, I missed pie, was gonna tell him about my bit level parsing of binary protocols in Haskell
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<fseidel> so, maybe this is the wrong channel for this
<fseidel> but if any of you are interested in submitting an FPGA demoscene thing to Demosplash, the deadline is 23:59 EST on Nov 2.
<fseidel> No one's ever submitted an FPGA demo, so I figure it would be worth mentioning
<fseidel> sorry if this sort of advertising isn't allowed, just let me know
<jn__> fseidel: ooh, cool
<shapr> I don't have the skills yet, but that would be awesome
* jn__ watches from the sidelines
<fseidel> the only one I know of is LFT's Parallelogram, so I figured the world could use more :-) I can't enter one since I'm an organizer :-P
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