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<tpw_rules>
blah i added a fifo and my display is still glitchy in direct proportion to how often i'm writing to the framebuffer
<tpw_rules>
ah, hm. it's not metastability in the fabric
<tpw_rules>
it's that each line gets redrawn bpp times. if the pixel changes between draws, it looks funky cause it turns into a completely different color
<tpw_rules>
or brightness. this will require a rearchitecting
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<OmniMancer>
Is there usually any source of minimum clock rate dependent operation that isn't DRAM?
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<daveshah>
OmniMancer: PLLs usually have a minimum input (and sometimes output) too
<OmniMancer>
Ah yes PLLs indeed
<OmniMancer>
Just wondering what kinds of things prevent fully static operation in things
<daveshah>
Yeah, most stuff these days is fine static
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<OmniMancer>
I am trying to figure out how to get the Anlogic tools to dump the spi flash out so I have a golden master before changing anything, but it is difficult
<OmniMancer>
Okay I managed to convince it and it seems the stock bitfile is what is available
<OmniMancer>
available online that is
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<OmniMancer>
I wonder if anyone has worked out how to drive the GD32F150 based JTAG adapter on the Tang Primer, it would be useful to have some open source tools to program the FPGA
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<ZirconiumX>
whitequark: I ran a comparison of ABC9 and FlowMap on a selection of IWLS2005 synthesis benchmarks. Interested?
<ZirconiumX>
I should probably throw ABC and FlowMap-r in there
<ZirconiumX>
ABC is done. FlowMap-r might take some time...
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