<zignig>
tpw_rules: can you type and it comes up on the led panel ?
<tpw_rules>
yeah that's what the latest commit does
<zignig>
nice work :) , now for some escape codes for color and scrollyness.
<tpw_rules>
well it's more for proof of concept. i think now i can get a bootloader rolling, which means i can use the sprams and upload actual content
<tpw_rules>
also need to do an spi engine so i can program that and load code
<zignig>
for the flash ? , that would be very cool.
<tpw_rules>
yeah it has 16 megs of it and only like 100k is the bitstream
<zignig>
I have a hexbootloader for the boneless, it uses my branch of the assembler, it's textual , but it may give you some ideas.
<tpw_rules>
i think i have a decent idea of what i want mine to look like
<tpw_rules>
i was doing some scheming yesterday about some boneless stuff and after several iterations eventually converged on just writing a register assignment engine
<tpw_rules>
thoughts about how to make reusing code easier. and establishing an ABI, at least quasi
<tpw_rules>
i kinda wish there were load/store relative to W instructions
<tpw_rules>
you can do it if you use LDW to set up your frame cause then you get the old W back and you can just use LD. but then you have to use up a register
<whitequark>
tpw_rules: yes i have a highlight on wq
<whitequark>
tpw_rules: re UART: possible! i'll recheck, thanks
<whitequark>
re W-relative load/store: the plan is to use LDW, yes
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<pepijndevos>
I need to find something new to say when I don't need your attention. brightparticle, the quark, her quarkness, she who shall not be highlighted, hmmm
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<pepijndevos>
daveshah, you mentioned that like ECP5, the bitstream CRC for the first frame is different, likely including some bytes before it. How does that work on ECP5?
<daveshah>
everything from after the "reset CRC" command ownards is included in that CRC
<pepijndevos>
I tried including any number of consecutive bytes, but don't get a match, so it must be more subtle than that.
<daveshah>
It's possible they initialise the CRC with something weird or something
<pepijndevos>
Like... I stored all the data in an array until the first frame CRC in an array and then looped over array[i:] calculating the CRC, so they are doing something weird.
<whitequark>
pepijndevos: doesn't matter, i get pinged all the time anyway. imgur URLs are particularly prone to false positives
<pepijndevos>
(btw, I'm looking into this because I managed my generic Nextpnr target to output something plausibly correct)
<daveshah>
Something to note is that ECP5 CRC calculation skips 0xFF NOP commands (but not 0xFF dummy bytes in the bitstream)
<daveshah>
Do you have a Gowin bitstream I could peek at?
<daveshah>
maybe try skipping the 1111111111111111 from CRC
<pepijndevos>
Will try
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<daveshah>
It's also possible that some of 0xFFs after 0x51 are to be skipped too
<pepijndevos>
daveshah, blegh, I looped over all the bytes with all possible ff removed, so it's something more weird. https://paste.ubuntu.com/p/59JjFzFPMp/ I'll keep trying.
<daveshah>
But this isn't all possible permutations of ff removed
<pepijndevos>
well, not all possible combinations, but I just started stripping ff and bytes from the start
<pepijndevos>
yea
<pepijndevos>
There are more things to try...
<daveshah>
you have to work out which FFs are NOP commands - which should be removed in ECP5 terms
<daveshah>
and which are part of arguments to other commands and therefore not removed
<pepijndevos>
It *seems* as if this line-delimited "binary" is one command per line, so only one NOP command, but it's obviously not so simple in reality.
<daveshah>
It's possible they're doing something a bit like Xilinx (I don't know the details) and applying the CRC differently to command and data
<daveshah>
(I'm sure mwk can tell you all about that one)
* mwk
feels summoned
<pepijndevos>
ewww
<mwk>
xilinx is doing something completely different
<mwk>
also their bitstream format works differently
<pepijndevos>
Xilinx and Intel should hold a competition who can come up with the most cursed ideas.
<mwk>
on xilinx, the thing going to CRC engine is a 37-bit concatenation of current register being written, and data payload
<mwk>
and triggers only on packet payloads, not on command headers (and then not for all registers, some are CRC-exempt)
<mwk>
(yes, the CRC register is actually shifted by 37 bits on every word)
<pepijndevos>
G (I was thinking there should be a ascii facepalm, and then realised G is kinda like a facepalm by itself)
<pepijndevos>
(－‸ლ)
<mwk>
I actually like that scheme
<mwk>
is it stockhold syndrome
<mwk>
*stockhome
<mwk>
*stockhjolm
<mwk>
*stockholm
<mwk>
ffs
<mwk>
maybe I should go back to sleep
<pepijndevos>
Maybe
<sensille>
pepijndevos: m(
<pepijndevos>
?
<sensille>
facepalm
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<duck2>
stockhold syndrome kinda makes sense
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<pepijndevos>
Okay, I bruteforced my way through all combinations and it makes no sense, but... ok, it works
<pepijndevos>
The commands to include are 11101111000 starting from LSB
<pepijndevos>
So it skips the first 3 commands, maybe b'\xa5\xc3' is "reset crc", but then it also skips b'\xd2\x00\xff\xff\x00\xff\xf0\x00'
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<daveshah>
pepijndevos: Interesting, I think 0xD2 is for setting SPI flash address
<daveshah>
Maybe it is skipped if unused or something
<pepijndevos>
No clue, could be
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